behaviour Architecture Reference

Inheritance diagram for behaviour:

[legend]

Collaboration diagram for behaviour:

[legend]

List of all members.

Signals
rclk_i	std_logic
rstb_i	std_logic
sclk_i	std_logic
scl_i	std_logic
sda_in_i	std_logic
sda_out_i	std_logic
l0_i	std_logic
l1b_i	std_logic
l2b_i	std_logic
mscl_i	std_logic
msda_i	std_logic
pasa_sw_i	std_logic
paps_errorb_i	std_logic := ' 1 '
rdoclk_en_i	std_logic
adcclk_en_i	std_logic
adc_add0_i	std_logic
adc_add1_i	std_logic
test_a_i	std_logic
test_b_i	std_logic
test_c_i	std_logic
rst_fbc_i	std_logic
bcout_ad_i	std_logic_vector ( 4 downto 0 )
oeba_l_i	std_logic
oeab_l_i	std_logic
oeba_h_i	std_logic
oeab_h_i	std_logic
ctr_in_i	std_logic
ctr_out_i	std_logic
bd_i	std_logic_vector ( 39 downto 0 )
cbus_i	std_logic_vector ( 14 downto 0 )
acknb_i	std_logic
errorb_i	std_logic
trsfb_i	std_logic
dstbb_i	std_logic
writeb_i	std_logic
cstbb_i	std_logic
otib_i	std_logic
mcst_i	std_logic
clk10_i	std_logic
debug_on_i	std_logic
altro_sw_i	std_logic
sample_clk_i	std_logic_vector ( 2 downto 0 )
altro_l1_i	std_logic
altro_l2_i	std_logic
alps_errorb_i	std_logic := ' 1 '
al_dolo_enb_i	std_logic
al_trsf_enb_i	std_logic
al_ackn_enb_i	std_logic
digital_reset_i	std_logic
test_on_i	std_logic
pulser_enable_i	std_logic
shift_in_i	std_logic_vector ( 2 downto 0 )
shift_clk_i	std_logic_vector ( 2 downto 0 )
hold_i	std_logic_vector ( 2 downto 0 )
dac_addr_i	std_logic_vector ( 11 downto 0 )
dac_data_i	std_logic_vector ( 7 downto 0 )
busy_i	std_logic
debug_i	std_logic_vector ( 14 downto 0 )
Component Instantiations
gtl_h1	gtl_transciever <Entity gtl_transciever>
gtl_h2	gtl_transciever <Entity gtl_transciever>
gtl_l1	gtl_transciever <Entity gtl_transciever>
gtl_l2	gtl_transciever <Entity gtl_transciever>
bc_1	bc <Entity bc>
adc	ad7417 <Entity ad7417>

---

Member Data Documentation

acknb_i std_logic [Signal]

adc ad7417 [Component Instantiation]

adc_add0_i std_logic [Signal]

adc_add1_i std_logic [Signal]

adcclk_en_i std_logic [Signal]

al_ackn_enb_i std_logic [Signal]

al_dolo_enb_i std_logic [Signal]

al_trsf_enb_i std_logic [Signal]

alps_errorb_i std_logic := ' 1 ' [Signal]

altro_l1_i std_logic [Signal]

altro_l2_i std_logic [Signal]

altro_sw_i std_logic [Signal]

bc_1 bc [Component Instantiation]

bcout_ad_i std_logic_vector ( 4 downto 0 ) [Signal]

bd_i std_logic_vector ( 39 downto 0 ) [Signal]

busy_i std_logic [Signal]

cbus_i std_logic_vector ( 14 downto 0 ) [Signal]

clk10_i std_logic [Signal]

cstbb_i std_logic [Signal]

ctr_in_i std_logic [Signal]

ctr_out_i std_logic [Signal]

dac_addr_i std_logic_vector ( 11 downto 0 ) [Signal]

dac_data_i std_logic_vector ( 7 downto 0 ) [Signal]

debug_i std_logic_vector ( 14 downto 0 ) [Signal]

debug_on_i std_logic [Signal]

digital_reset_i std_logic [Signal]

dstbb_i std_logic [Signal]

errorb_i std_logic [Signal]

gtl_h1 gtl_transciever [Component Instantiation]

gtl_h2 gtl_transciever [Component Instantiation]

gtl_l1 gtl_transciever [Component Instantiation]

gtl_l2 gtl_transciever [Component Instantiation]

hold_i std_logic_vector ( 2 downto 0 ) [Signal]

l0_i std_logic [Signal]

l1b_i std_logic [Signal]

l2b_i std_logic [Signal]

mcst_i std_logic [Signal]

mscl_i std_logic [Signal]

msda_i std_logic [Signal]

oeab_h_i std_logic [Signal]

oeab_l_i std_logic [Signal]

oeba_h_i std_logic [Signal]

oeba_l_i std_logic [Signal]

otib_i std_logic [Signal]

paps_errorb_i std_logic := ' 1 ' [Signal]

pasa_sw_i std_logic [Signal]

pulser_enable_i std_logic [Signal]

rclk_i std_logic [Signal]

rdoclk_en_i std_logic [Signal]

rst_fbc_i std_logic [Signal]

rstb_i std_logic [Signal]

sample_clk_i std_logic_vector ( 2 downto 0 ) [Signal]

scl_i std_logic [Signal]

sclk_i std_logic [Signal]

sda_in_i std_logic [Signal]

sda_out_i std_logic [Signal]

shift_clk_i std_logic_vector ( 2 downto 0 ) [Signal]

shift_in_i std_logic_vector ( 2 downto 0 ) [Signal]

test_a_i std_logic [Signal]

test_b_i std_logic [Signal]

test_c_i std_logic [Signal]

test_on_i std_logic [Signal]

trsfb_i std_logic [Signal]

writeb_i std_logic [Signal]

---

The documentation for this class was generated from the following file:

• fec/fec.vhd