fec Entity Reference

Inheritance diagram for fec:

[legend]

Collaboration diagram for fec:

[legend]

List of all members.

Architectures
behaviour	Architecture
Libraries
ieee
ad7417_model
Packages
std_logic_1164
numeric_std
ad7417_pack	Package <ad7417_pack>
bc_pack	Package <bc_pack>
fec_misc_pack	Package <fec_misc_pack>
Generics
HADD	std_logic_vector ( 4 downto 0 ) := " 00000 "
Ports
bd	inout std_logic_vector ( 39 downto 0 )
writ	in std_logic
cstb	in std_logic
ackn	out std_logic
eror	out std_logic
trsf	out std_logic
dstb	out std_logic
inter	out std_logic
lvl0	in std_logic
lvl1	in std_logic
lvl2	in std_logic
grst	in std_logic
sclk	in std_logic
rclk	in std_logic
scl	in std_logic
sin	in std_logic
sout	out std_logic

---

Member Data Documentation

ackn out std_logic [Port]

ad7417_model library [Library]

ad7417_pack package [Package]

bc_pack package [Package]

bd inout std_logic_vector ( 39 downto 0 ) [Port]

cstb in std_logic [Port]

dstb out std_logic [Port]

eror out std_logic [Port]

fec_misc_pack package [Package]

grst in std_logic [Port]

HADD std_logic_vector ( 4 downto 0 ) := " 00000 " [Generic]

ieee library [Library]

inter out std_logic [Port]

lvl0 in std_logic [Port]

lvl1 in std_logic [Port]

lvl2 in std_logic [Port]

numeric_std package [Package]

rclk in std_logic [Port]

scl in std_logic [Port]

sclk in std_logic [Port]

sin in std_logic [Port]

sout out std_logic [Port]

std_logic_1164 package [Package]

trsf out std_logic [Port]

writ in std_logic [Port]

---

The documentation for this class was generated from the following file:

• fec/fec.vhd