Architectures | |
rtl | Architecture |
rtl2 | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
numeric_std | |
Ports | |
clk | in std_logic |
rstb | in std_logic |
data | in std_logic_vector ( 7 downto 0 ) |
shiftin | in std_logic |
enable | in std_logic |
load | in std_logic |
clear | in std_logic |
cnt_8 | out std_logic |
shiftout | out std_logic |
q | out std_logic_vector ( 7 downto 0 ) |
clear in std_logic [Port] |
clk in std_logic [Port] |
cnt_8 out std_logic [Port] |
data in std_logic_vector ( 7 downto 0 ) [Port] |
enable in std_logic [Port] |
ieee library [Library] |
load in std_logic [Port] |
numeric_std package [Package] |
q out std_logic_vector ( 7 downto 0 ) [Port] |
rstb in std_logic [Port] |
shiftin in std_logic [Port] |
shiftout out std_logic [Port] |
std_logic_1164 package [Package] |