msm2_reg_so Entity Reference

Inheritance diagram for msm2_reg_so:

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Collaboration diagram for msm2_reg_so:

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List of all members.

Architectures
rtl	Architecture
Libraries
IEEE
Packages
std_logic_1164
Generics
reg_width	integer := 8
Ports
DIN	in std_logic_vector ( 7 downto 0 )
CLK	in std_logic
LD	in std_logic
rst	in std_logic
SE	in std_logic
SO	out std_logic

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Member Data Documentation

CLK in std_logic [Port]

DIN in std_logic_vector ( 7 downto 0 ) [Port]

IEEE library [Library]

LD in std_logic [Port]

reg_width integer := 8 [Generic]

rst in std_logic [Port]

SE in std_logic [Port]

SO out std_logic [Port]

std_logic_1164 package [Package]

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The documentation for this class was generated from the following file:

• msmodule2/msm2_interface_i2c/msm2_reg_so/msm2_reg_so.vhd