intrech Entity Reference
[Model of ALTRO chip]

Inheritance diagram for intrech:

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Collaboration diagram for intrech:

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List of all members.

Architectures
rtl	Architecture
Libraries
ieee
Packages
std_logic_1164
Ports
clk2	in std_logic
rstb	in std_logic
cstb	in std_logic
cs	in std_logic
done	in std_logic
chrdo	in std_logic
valid	in std_logic
rdo_done	in std_logic
idle	out std_logic
decode	out std_logic
exec	out std_logic
en1	out std_logic
ack	out std_logic
en2	out std_logic
exrdo	out std_logic
h_err	out std_logic
h_abt	out std_logic

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Detailed Description

Decode exection of bus instructions

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Member Data Documentation

ack out std_logic [Port]

chrdo in std_logic [Port]

clk2 in std_logic [Port]

cs in std_logic [Port]

cstb in std_logic [Port]

decode out std_logic [Port]

done in std_logic [Port]

en1 out std_logic [Port]

en2 out std_logic [Port]

exec out std_logic [Port]

exrdo out std_logic [Port]

h_abt out std_logic [Port]

h_err out std_logic [Port]

idle out std_logic [Port]

ieee library [Library]

rdo_done in std_logic [Port]

rstb in std_logic [Port]

std_logic_1164 package [Package]

valid in std_logic [Port]

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The documentation for this class was generated from the following file:

• altro/intrech.vhd