intctrl Entity Reference
[Model of ALTRO chip]

Inheritance diagram for intctrl:

[legend]

Collaboration diagram for intctrl:

[legend]

List of all members.

Architectures
rtl	Architecture
Libraries
ieee
altro_model
Packages
std_logic_1164
intrech_pack	Package <intrech_pack>
intrdoh_pack	Package <intrdoh_pack>
Ports
clk2	in std_logic
	Clock 2.
rstb	in std_logic
	reset
done	in std_logic
	Done.
ch_red	in std_logic
	Channel read.
cstb	in std_logic
	Control strobe.
cs	in std_logic
	Card select.
chrdo	in std_logic
	Channel readout.
valid	in std_logic
	Valid instruction.
load	out std_logic
	Load data.
exec	out std_logic
	Execute.
en1	out std_logic
	Enable.
ack	out std_logic
	Acknowledge.
en2	out std_logic
	Enable.
rdo	out std_logic
	Read-out.
waitst	out std_logic
	Wait state.
h_err	out std_logic
	Hamming state-machine error.
h_abt	out std_logic
	Hamming state machine abort.
loadcs	out std_logic
	Load card switch.

---

Detailed Description

Controller

---

Member Data Documentation

ack out std_logic [Port]

Acknowledge.

altro_model library [Library]

ch_red in std_logic [Port]

Channel read.

chrdo in std_logic [Port]

Channel readout.

clk2 in std_logic [Port]

Clock 2.

cs in std_logic [Port]

Card select.

cstb in std_logic [Port]

Control strobe.

done in std_logic [Port]

Done.

en1 out std_logic [Port]

Enable.

en2 out std_logic [Port]

Enable.

exec out std_logic [Port]

Execute.

h_abt out std_logic [Port]

Hamming state machine abort.

h_err out std_logic [Port]

Hamming state-machine error.

ieee library [Library]

intrdoh_pack package [Package]

intrech_pack package [Package]

load out std_logic [Port]

Load data.

loadcs out std_logic [Port]

Load card switch.

rdo out std_logic [Port]

Read-out.

rstb in std_logic [Port]

reset

std_logic_1164 package [Package]

valid in std_logic [Port]

Valid instruction.

waitst out std_logic [Port]

Wait state.

---

The documentation for this class was generated from the following file:

• altro/intctrl.vhd