bc_core Entity Reference
Inheritance diagram for bc_core:
Collaboration diagram for bc_core:
Architectures | |
| rtl | Architecture |
| rtl2 | Architecture |
Libraries | |
| ieee | |
Packages | |
| std_logic_1164 | |
| interfacedec_pack | Package <interfacedec_pack> |
| altrobusinterface_pack | Package <altrobusinterface_pack> |
| registers_pack | Package <registers_pack> |
| tsm_decoder_pack | Package <tsm_decoder_pack> |
| altro_sw_mask_out_pack | Package <altro_sw_mask_out_pack> |
| interface_adc_pack | Package <interface_adc_pack> |
| tsm_man_pack | Package <tsm_man_pack> |
| evl_man_pack | Package <evl_man_pack> |
| trsf_mux_pack | Package <trsf_mux_pack> |
| slave_pack | Package <slave_pack> |
Ports | |
| clk | in std_logic |
| sclk | in std_logic |
| rstb | in std_logic |
| cstb | in std_logic |
| write | in std_logic |
| dstb | in std_logic |
| trsf | in std_logic |
| l1_trg | in std_logic |
| l2_trg | in std_logic |
| ackn | in std_logic |
| hadd | in std_logic_vector ( 4 downto 0 ) |
| din | in std_logic_vector ( 39 downto 0 ) |
| scl | in std_logic |
| sda_in | in std_logic |
| sda_out | out std_logic |
| slctr | out std_logic |
| paps_error | in std_logic |
| alps_error | in std_logic |
| al_err | in std_logic |
| debug_sw | in std_logic |
| bc_ackn_en | out std_logic |
| bc_ackn | out std_logic |
| lastst_al | out std_logic |
| endtrans | out std_logic |
| bc_dolo_en | out std_logic |
| bc_cs | out std_logic |
| al_cs | out std_logic |
| wr_al | out std_logic |
| dout | out std_logic_vector ( 15 downto 0 ) |
| bc_int | out std_logic |
| bc_error | out std_logic |
| altro_sw | out std_logic |
| pasa_sw | out std_logic |
| al_rst | out std_logic |
| rdoclk_en | out std_logic |
| adcclk_en | out std_logic |
| adc_add0 | out std_logic |
| adc_add1 | out std_logic |
| tsm_on | out std_logic |
| card_isolation | out std_logic |
| test_a | out std_logic |
| test_b | out std_logic |
| test_c | out std_logic |
| test_d | out std_logic |
| test_e | out std_logic |
| test_f | out std_logic |
| test_g | out std_logic |
| test_h | out std_logic |
| mscl | out std_logic |
| msda | inout std_logic |
| rmtrsf_en | out std_logic |
| rmtrsf | out std_logic |
| rmdstb | out std_logic |
| rmdata_out | out std_logic_vector ( 39 downto 0 ) |
| mem_wren | out std_logic |
| sclk_edge | out std_logic |
| evl_cstb | out std_logic |
| alevl_rdtrx | out std_logic |
| bc_master | out std_logic |
| evl_addr | out std_logic_vector ( 39 downto 20 ) |
| fmdd_stat | in std_logic_vector ( 15 downto 0 ) |
| l0 | in std_logic |
| hold_wait | out std_logic_vector ( 15 downto 0 ) |
| l1_timeout | out std_logic_vector ( 15 downto 0 ) |
| l2_timeout | out std_logic_vector ( 15 downto 0 ) |
| shift_div | out std_logic_vector ( 15 downto 0 ) |
| strips | out std_logic_vector ( 15 downto 0 ) |
| cal_level | out std_logic_vector ( 15 downto 0 ) |
| shape_bias | out std_logic_vector ( 15 downto 0 ) |
| vfs | out std_logic_vector ( 15 downto 0 ) |
| vfp | out std_logic_vector ( 15 downto 0 ) |
| sample_div | out std_logic_vector ( 15 downto 0 ) |
| fmdd_cmd | out std_logic_vector ( 15 downto 0 ) |
| cal_iter | out std_logic_vector ( 15 downto 0 ) |
| cal_delay | out std_logic_vector ( 15 downto 0 ) |
| mebs | out std_logic_vector ( 4 downto 0 ) |
| meb_cnt | in std_logic_vector ( 3 downto 0 ) |
| al_rpinc | out std_logic |
| debug | out std_logic_vector ( 15 downto 0 ) |
Member Data Documentation
ackn in std_logic [Port] |
adc_add0 out std_logic [Port] |
adc_add1 out std_logic [Port] |
adcclk_en out std_logic [Port] |
al_cs out std_logic [Port] |
al_err in std_logic [Port] |
al_rpinc out std_logic [Port] |
al_rst out std_logic [Port] |
alevl_rdtrx out std_logic [Port] |
alps_error in std_logic [Port] |
altro_sw out std_logic [Port] |
altro_sw_mask_out_pack package [Package] |
altrobusinterface_pack package [Package] |
bc_ackn out std_logic [Port] |
bc_ackn_en out std_logic [Port] |
bc_cs out std_logic [Port] |
bc_dolo_en out std_logic [Port] |
bc_error out std_logic [Port] |
bc_int out std_logic [Port] |
bc_master out std_logic [Port] |
cal_delay out std_logic_vector ( 15 downto 0 ) [Port] |
cal_iter out std_logic_vector ( 15 downto 0 ) [Port] |
cal_level out std_logic_vector ( 15 downto 0 ) [Port] |
card_isolation out std_logic [Port] |
clk in std_logic [Port] |
cstb in std_logic [Port] |
debug out std_logic_vector ( 15 downto 0 ) [Port] |
debug_sw in std_logic [Port] |
din in std_logic_vector ( 39 downto 0 ) [Port] |
dout out std_logic_vector ( 15 downto 0 ) [Port] |
dstb in std_logic [Port] |
endtrans out std_logic [Port] |
evl_addr out std_logic_vector ( 39 downto 20 ) [Port] |
evl_cstb out std_logic [Port] |
evl_man_pack package [Package] |
fmdd_cmd out std_logic_vector ( 15 downto 0 ) [Port] |
fmdd_stat in std_logic_vector ( 15 downto 0 ) [Port] |
hadd in std_logic_vector ( 4 downto 0 ) [Port] |
hold_wait out std_logic_vector ( 15 downto 0 ) [Port] |
ieee library [Library] |
interface_adc_pack package [Package] |
interfacedec_pack package [Package] |
l0 in std_logic [Port] |
l1_timeout out std_logic_vector ( 15 downto 0 ) [Port] |
l1_trg in std_logic [Port] |
l2_timeout out std_logic_vector ( 15 downto 0 ) [Port] |
l2_trg in std_logic [Port] |
lastst_al out std_logic [Port] |
meb_cnt in std_logic_vector ( 3 downto 0 ) [Port] |
mebs out std_logic_vector ( 4 downto 0 ) [Port] |
mem_wren out std_logic [Port] |
mscl out std_logic [Port] |
msda inout std_logic [Port] |
paps_error in std_logic [Port] |
pasa_sw out std_logic [Port] |
rdoclk_en out std_logic [Port] |
registers_pack package [Package] |
rmdata_out out std_logic_vector ( 39 downto 0 ) [Port] |
rmdstb out std_logic [Port] |
rmtrsf out std_logic [Port] |
rmtrsf_en out std_logic [Port] |
rstb in std_logic [Port] |
sample_div out std_logic_vector ( 15 downto 0 ) [Port] |
scl in std_logic [Port] |
sclk in std_logic [Port] |
sclk_edge out std_logic [Port] |
sda_in in std_logic [Port] |
sda_out out std_logic [Port] |
shape_bias out std_logic_vector ( 15 downto 0 ) [Port] |
shift_div out std_logic_vector ( 15 downto 0 ) [Port] |
slave_pack package [Package] |
slctr out std_logic [Port] |
std_logic_1164 package [Package] |
strips out std_logic_vector ( 15 downto 0 ) [Port] |
test_a out std_logic [Port] |
test_b out std_logic [Port] |
test_c out std_logic [Port] |
test_d out std_logic [Port] |
test_e out std_logic [Port] |
test_f out std_logic [Port] |
test_g out std_logic [Port] |
test_h out std_logic [Port] |
trsf in std_logic [Port] |
trsf_mux_pack package [Package] |
tsm_decoder_pack package [Package] |
tsm_man_pack package [Package] |
tsm_on out std_logic [Port] |
vfp out std_logic_vector ( 15 downto 0 ) [Port] |
vfs out std_logic_vector ( 15 downto 0 ) [Port] |
wr_al out std_logic [Port] |
write in std_logic [Port] |
The documentation for this class was generated from the following file:
- bc/bc_core/bc_core.vhd
