Architectures | |
rtl | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
fec_address_pack | Package <fec_address_pack> |
serializer_bc_pack | Package <serializer_bc_pack> |
slave_rx_pack | Package <slave_rx_pack> |
slave_tx_pack | Package <slave_tx_pack> |
sel_signals_pack | Package <sel_signals_pack> |
Ports | |
clk | in std_logic |
rstb | in std_logic |
scl | in std_logic |
sda_in | in std_logic |
hadd | in std_logic_vector ( 4 downto 0 ) |
data_tx | in std_logic_vector ( 15 downto 0 ) |
bc_rst | in std_logic |
csr1_clr | in std_logic |
sda_out | out std_logic |
reg_add | out std_logic_vector ( 6 downto 0 ) |
data_rx | out std_logic_vector ( 15 downto 0 ) |
slctr | out std_logic |
we | out std_logic |
ierr_sc | out std_logic |
state | out std_logic_vector ( 10 downto 0 ) |
bc_rst in std_logic [Port] |
clk in std_logic [Port] |
csr1_clr in std_logic [Port] |
data_rx out std_logic_vector ( 15 downto 0 ) [Port] |
data_tx in std_logic_vector ( 15 downto 0 ) [Port] |
fec_address_pack package [Package] |
hadd in std_logic_vector ( 4 downto 0 ) [Port] |
ieee library [Library] |
ierr_sc out std_logic [Port] |
reg_add out std_logic_vector ( 6 downto 0 ) [Port] |
rstb in std_logic [Port] |
scl in std_logic [Port] |
sda_in in std_logic [Port] |
sda_out out std_logic [Port] |
sel_signals_pack package [Package] |
serializer_bc_pack package [Package] |
slave_rx_pack package [Package] |
slave_tx_pack package [Package] |
slctr out std_logic [Port] |
state out std_logic_vector ( 10 downto 0 ) [Port] |
std_logic_1164 package [Package] |
we out std_logic [Port] |