signals_driver Entity Reference

Inheritance diagram for signals_driver:

Collaboration diagram for signals_driver:

Architectures
rtl	Architecture
Libraries
ieee
Packages
std_logic_1164
mux_bus_pack	Package <mux_bus_pack>
Ports
clk	in std_logic
rstb	in std_logic
dout	in std_logic_vector ( 15 downto 0 )
bc_dolo_en	in std_logic
bc_ackn	in std_logic
bc_ackn_en	in std_logic
bc_error	in std_logic
evl_addr	in std_logic_vector ( 39 downto 20 )
alevl_rdtrx	in std_logic
evl_cstb	in std_logic
rmdata_out	in std_logic_vector ( 39 downto 0 )
rmtrsf	in std_logic
rmtrsf_en	in std_logic
rmdstb	in std_logic
din	out std_logic_vector ( 39 downto 0 )
al_errorb	out std_logic
bd	inout std_logic_vector ( 39 downto 0 )
errorb	inout std_logic
acknb	inout std_logic
trsfb	inout std_logic
dstbb	inout std_logic
writeb	inout std_logic
cstbb	inout std_logic

Member Data Documentation

acknb inout std_logic [Port]

al_errorb out std_logic [Port]

alevl_rdtrx in std_logic [Port]

bc_ackn in std_logic [Port]

bc_ackn_en in std_logic [Port]

bc_dolo_en in std_logic [Port]

bc_error in std_logic [Port]

bd inout std_logic_vector ( 39 downto 0 ) [Port]

clk in std_logic [Port]

cstbb inout std_logic [Port]

din out std_logic_vector ( 39 downto 0 ) [Port]

dout in std_logic_vector ( 15 downto 0 ) [Port]

dstbb inout std_logic [Port]

errorb inout std_logic [Port]

evl_addr in std_logic_vector ( 39 downto 20 ) [Port]

evl_cstb in std_logic [Port]

ieee library [Library]

mux_bus_pack package [Package]

rmdata_out in std_logic_vector ( 39 downto 0 ) [Port]

rmdstb in std_logic [Port]

rmtrsf in std_logic [Port]

rmtrsf_en in std_logic [Port]

rstb in std_logic [Port]

std_logic_1164 package [Package]

trsfb inout std_logic [Port]

writeb inout std_logic [Port]

The documentation for this class was generated from the following file: