rtl Architecture Reference

Inheritance diagram for rtl:

Collaboration diagram for rtl:

Functions
std_logic_vector	u2slv ( constant x: in unsigned )
unsigned	slv2u ( constant x: in std_logic_vector )
Processes
adc_register	( clk , rstb )
reg_register	( clk , rstb )
output	( clk )
ans_cmds	( clk , rstb )
errors	( clk , rstb )
Signals
t1_th_i	unsigned ( 9 downto 0 )
	Th: First ADC T.
flash_i_th_i	unsigned ( 9 downto 0 )
	Th: I 3.3 V.
al_dig_i_th_i	unsigned ( 9 downto 0 )
	Th: I 2.5 V altro digital.
al_ana_i_th_i	unsigned ( 9 downto 0 )
	Th: I 2.5 V altro analog.
va_rec_ip_th_i	unsigned ( 9 downto 0 )
	Th: I 2.5 V VA.
t1_i	unsigned ( 9 downto 0 )
	Cu: First ADC T.
flash_i_i	unsigned ( 9 downto 0 )
	Cu: I 3.3 V.
al_dig_i_i	unsigned ( 9 downto 0 )
	Cu: I 2.5 V altro digital.
al_ana_i_i	unsigned ( 9 downto 0 )
	Cu: I 2.5 V altro analog.
va_rec_ip_i	unsigned ( 9 downto 0 )
	Cu: I 2.5 V VA.
t2_th_i	unsigned ( 9 downto 0 )
	Th: Second ADC T.
va_sup_ip_th_i	unsigned ( 9 downto 0 )
	Th: I 1.5 V VA.
va_rec_im_th_i	unsigned ( 9 downto 0 )
	Th: I -2.0 V.
va_sup_im_th_i	unsigned ( 9 downto 0 )
	Th: I -2.0 V VA.
gtl_u_th_i	unsigned ( 9 downto 0 )
	Th: 2.5 V Digital driver.
t2_i	unsigned ( 9 downto 0 )
	Cu: Second ADC T.
va_sup_ip_i	unsigned ( 9 downto 0 )
	Cu: I 1.5 V VA.
va_rec_im_i	unsigned ( 9 downto 0 )
	Cu: I -2.0 V.
va_sup_im_i	unsigned ( 9 downto 0 )
	Cu: I -2.0 V VA.
gtl_u_i	unsigned ( 9 downto 0 )
	Cu: 2.5 V Digital driver.
t3_th_i	unsigned ( 9 downto 0 )
	Th: Third ADC T.
t1sens_th_i	unsigned ( 9 downto 0 )
	Th: Temperature sens. 1.
t2sens_th_i	unsigned ( 9 downto 0 )
	Th: Temperature sens. 2.
al_dig_u_th_i	unsigned ( 9 downto 0 )
	Th: U 2.5 altro digital.
al_ana_u_th_i	unsigned ( 9 downto 0 )
	Th: U 2.5 altro analog.
t3_i	unsigned ( 9 downto 0 )
	Cu: Third ADC T.
t1sens_i	unsigned ( 9 downto 0 )
	Cu: Temperature sens. 1.
t2sens_i	unsigned ( 9 downto 0 )
	Cu: Temperature sens. 2.
al_dig_u_i	unsigned ( 9 downto 0 )
	Cu: U 2.5 altro digital.
al_ana_u_i	unsigned ( 9 downto 0 )
	Cu: U 2.5 altro analog.
t4_th_i	unsigned ( 9 downto 0 )
	Th: Forth ADC T.
va_rec_up_th_i	unsigned ( 9 downto 0 )
	Th: U 2.5 VA (m).
va_sup_up_th_i	unsigned ( 9 downto 0 )
	Th: U 1.5 VA (m).
va_sup_um_th_i	unsigned ( 9 downto 0 )
	Th: U -2.0 VA (m).
va_rec_um_th_i	unsigned ( 9 downto 0 )
	Th: U -2.0 (m).
t4_i	unsigned ( 9 downto 0 )
	Cu: Forth ADC T.
va_rec_up_i	unsigned ( 9 downto 0 )
	Cu: U 2.5 VA (m).
va_sup_up_i	unsigned ( 9 downto 0 )
	Cu: U 1.5 VA (m).
va_sup_um_i	unsigned ( 9 downto 0 )
	Cu: U -2.0 VA (m).
va_rec_um_i	unsigned ( 9 downto 0 )
	Cu: U -2.0 (m).
l1cnt_i	unsigned ( 15 downto 0 )
	L1 counter.
l2cnt_i	unsigned ( 15 downto 0 )
	L2 counter.
sclkcnt_i	unsigned ( 15 downto 0 )
	Slow clock counter.
tsm_word_i	unsigned ( 8 downto 0 )
	Test mode words.
us_ratio_i	unsigned ( 15 downto 0 ) := ( others = > ' 0 ' )
csr0_i	unsigned ( 10 downto 0 ) := ( others = > ' 0 ' )
csr1_i	unsigned ( 13 downto 0 )
	Config/Status 1.
csr2_i	unsigned ( 15 downto 0 )
	Config/Status 2.
csr3_i	unsigned ( 15 downto 0 )
	Config/Status 3.
l0cnt_i	unsigned ( 15 downto 0 )
	L0 counters.
hold_wait_i	unsigned ( 15 downto 0 )
	FMD: Wait to hold.
l1_timeout_i	unsigned ( 15 downto 0 )
	FMD: L1 timeout.
l2_timeout_i	unsigned ( 15 downto 0 )
	FMD: L2 timeout.
shift_div_i	unsigned ( 15 downto 0 )
	FMD: Shift clk.
strips_i	unsigned ( 15 downto 0 )
	FMD: Strips.
cal_level_i	unsigned ( 15 downto 0 )
	FMD: Cal pulse.
cal_iter_i	unsigned ( 15 downto 0 )
	FMD: Cal events.
shape_bias_i	unsigned ( 15 downto 0 )
	FMD: Shape bias.
vfs_i	unsigned ( 15 downto 0 )
	FMD: Shape ref.
vfp_i	unsigned ( 15 downto 0 )
	FMD: Preamp ref.
sample_div_i	unsigned ( 15 downto 0 )
	FMD: Sample clk.
fmdd_cmd_i	unsigned ( 15 downto 0 )
	FMD: Commands.
mebs_i	unsigned ( 4 downto 0 )
	MEB config.
t1_th_r	unsigned ( 9 downto 0 )
	Th: First ADC T.
flash_i_th_r	unsigned ( 9 downto 0 )
	Th: I 3.3 V.
al_dig_i_th_r	unsigned ( 9 downto 0 )
	Th: I 2.5 V altro digital.
al_ana_i_th_r	unsigned ( 9 downto 0 )
	Th: I 2.5 V altro analog.
va_rec_ip_th_r	unsigned ( 9 downto 0 )
	Th: I 2.5 V VA.
t1_r	unsigned ( 9 downto 0 )
	Cu: First ADC T.
flash_i_r	unsigned ( 9 downto 0 )
	Cu: I 3.3 V.
al_dig_i_r	unsigned ( 9 downto 0 )
	Cu: I 2.5 V altro digital.
al_ana_i_r	unsigned ( 9 downto 0 )
	Cu: I 2.5 V altro analog.
va_rec_ip_r	unsigned ( 9 downto 0 )
	Cu: I 2.5 V VA.
t2_th_r	unsigned ( 9 downto 0 )
	Th: Second ADC T.
va_sup_ip_th_r	unsigned ( 9 downto 0 )
	Th: I 1.5 V VA.
va_rec_im_th_r	unsigned ( 9 downto 0 )
	Th: I -2.0 V.
va_sup_im_th_r	unsigned ( 9 downto 0 )
	Th: I -2.0 V VA.
gtl_u_th_r	unsigned ( 9 downto 0 )
	Th: 2.5 V Digital driver.
t2_r	unsigned ( 9 downto 0 )
	Cu: Second ADC T.
va_sup_ip_r	unsigned ( 9 downto 0 )
	Cu: I 1.5 V VA.
va_rec_im_r	unsigned ( 9 downto 0 )
	Cu: I -2.0 V.
va_sup_im_r	unsigned ( 9 downto 0 )
	Cu: I -2.0 V VA.
gtl_u_r	unsigned ( 9 downto 0 )
	Cu: 2.5 V Digital driver.
t3_th_r	unsigned ( 9 downto 0 )
	Th: Third ADC T.
t1sens_th_r	unsigned ( 9 downto 0 )
	Th: Temperature sens. 1.
t2sens_th_r	unsigned ( 9 downto 0 )
	Th: Temperature sens. 2.
al_dig_u_th_r	unsigned ( 9 downto 0 )
	Th: U 2.5 altro digital.
al_ana_u_th_r	unsigned ( 9 downto 0 )
	Th: U 2.5 altro analog.
t3_r	unsigned ( 9 downto 0 )
	Cu: Third ADC T.
t1sens_r	unsigned ( 9 downto 0 )
	Cu: Temperature sens. 1.
t2sens_r	unsigned ( 9 downto 0 )
	Cu: Temperature sens. 2.
al_dig_u_r	unsigned ( 9 downto 0 )
	Cu: U 2.5 altro digital.
al_ana_u_r	unsigned ( 9 downto 0 )
	Cu: U 2.5 altro analog.
t4_th_r	unsigned ( 9 downto 0 )
	Th: Forth ADC T.
va_rec_up_th_r	unsigned ( 9 downto 0 )
	Th: U 2.5 VA (m).
va_sup_up_th_r	unsigned ( 9 downto 0 )
	Th: U 1.5 VA (m).
va_sup_um_th_r	unsigned ( 9 downto 0 )
	Th: U -2.0 VA (m).
va_rec_um_th_r	unsigned ( 9 downto 0 )
	Th: U -2.0 (m).
t4_r	unsigned ( 9 downto 0 )
	Cu: Forth ADC T.
va_rec_up_r	unsigned ( 9 downto 0 )
	Cu: U 2.5 VA (m).
va_sup_up_r	unsigned ( 9 downto 0 )
	Cu: U 1.5 VA (m).
va_sup_um_r	unsigned ( 9 downto 0 )
	Cu: U -2.0 VA (m).
va_rec_um_r	unsigned ( 9 downto 0 )
	Cu: U -2.0 (m).
l1cnt_r	unsigned ( 15 downto 0 )
	L1 counter.
l2cnt_r	unsigned ( 15 downto 0 )
	L2 counter.
sclkcnt_r	unsigned ( 15 downto 0 )
	Slow clock counter.
dstbcnt_r	unsigned ( 7 downto 0 )
	Data strobe counter.
tsm_word_r	unsigned ( 8 downto 0 )
	Test mode words.
us_ratio_r	unsigned ( 15 downto 0 )
	Under sampling ratio.
csr0_r	unsigned ( 10 downto 0 ) := ( others = > ' 0 ' )
csr1_r	unsigned ( 13 downto 0 ) := ( others = > ' 0 ' )
csr2_r	unsigned ( 15 downto 0 )
	Config/Status 2.
csr3_r	unsigned ( 15 downto 0 )
	Config/Status 3.
fmdd_stat_r	unsigned ( 15 downto 0 )
	FMDD status.
l0cnt_r	unsigned ( 15 downto 0 )
	L0 counters.
hold_wait_r	unsigned ( 15 downto 0 )
	FMD: Wait to hold.
l1_timeout_r	unsigned ( 15 downto 0 )
	FMD: L1 timeout.
l2_timeout_r	unsigned ( 15 downto 0 )
	FMD: L2 timeout.
shift_div_r	unsigned ( 15 downto 0 )
	FMD: Shift clk.
strips_r	unsigned ( 15 downto 0 )
	FMD: Strips.
cal_level_r	unsigned ( 15 downto 0 )
	FMD: Cal pulse.
cal_iter_r	unsigned ( 15 downto 0 )
	FMD: Cal events.
shape_bias_r	unsigned ( 15 downto 0 )
	FMD: Shape bias.
vfs_r	unsigned ( 15 downto 0 )
	FMD: Shape ref.
vfp_r	unsigned ( 15 downto 0 )
	FMD: Preamp ref.
sample_div_r	unsigned ( 15 downto 0 )
	FMD: Sample clk.
fmdd_cmd_r	unsigned ( 15 downto 0 )
	FMD: Commands.
meb_r	unsigned ( 8 downto 0 )
	MEB config.
csr1_ii	unsigned ( 13 downto 0 )
cnv_mode_i	std_logic
bc_error_i	std_logic
bc_int_i	std_logic
ints_i	std_logic_vector ( 4 downto 0 )
old_end_cnv_i	std_logic
meb_cnt_i	unsigned ( 3 downto 0 )

Member Function Documentation

[Process]

adc_register		( clk ,
		rstb )

[Process]

ans_cmds		( clk ,
		rstb )

[Process]

errors		( clk ,
		rstb )

[Process]

output ( clk )

[Process]

reg_register		( clk ,
		rstb )

[Function]

unsigned slv2u (constant x in std_logic_vector )

[Function]

std_logic_vector u2slv (constant x in unsigned )

Member Data Documentation

al_ana_i_i unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V altro analog.

al_ana_i_r unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V altro analog.

al_ana_i_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V altro analog.

al_ana_i_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V altro analog.

al_ana_u_i unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 altro analog.

al_ana_u_r unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 altro analog.

al_ana_u_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 altro analog.

al_ana_u_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 altro analog.

al_dig_i_i unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V altro digital.

al_dig_i_r unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V altro digital.

al_dig_i_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V altro digital.

al_dig_i_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V altro digital.

al_dig_u_i unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 altro digital.

al_dig_u_r unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 altro digital.

al_dig_u_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 altro digital.

al_dig_u_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 altro digital.

bc_error_i std_logic [Signal]

bc_int_i std_logic [Signal]

cal_iter_i unsigned ( 15 downto 0 ) [Signal]

FMD: Cal events.

cal_iter_r unsigned ( 15 downto 0 ) [Signal]

FMD: Cal events.

cal_level_i unsigned ( 15 downto 0 ) [Signal]

FMD: Cal pulse.

cal_level_r unsigned ( 15 downto 0 ) [Signal]

FMD: Cal pulse.

cnv_mode_i std_logic [Signal]

csr0_i unsigned ( 10 downto 0 ) := ( others = > ' 0 ' ) [Signal]

csr0_r unsigned ( 10 downto 0 ) := ( others = > ' 0 ' ) [Signal]

csr1_i unsigned ( 13 downto 0 ) [Signal]

Config/Status 1.

csr1_ii unsigned ( 13 downto 0 ) [Signal]

csr1_r unsigned ( 13 downto 0 ) := ( others = > ' 0 ' ) [Signal]

csr2_i unsigned ( 15 downto 0 ) [Signal]

Config/Status 2.

csr2_r unsigned ( 15 downto 0 ) [Signal]

Config/Status 2.

csr3_i unsigned ( 15 downto 0 ) [Signal]

Config/Status 3.

csr3_r unsigned ( 15 downto 0 ) [Signal]

Config/Status 3.

dstbcnt_r unsigned ( 7 downto 0 ) [Signal]

Data strobe counter.

flash_i_i unsigned ( 9 downto 0 ) [Signal]

Cu: I 3.3 V.

flash_i_r unsigned ( 9 downto 0 ) [Signal]

Cu: I 3.3 V.

flash_i_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I 3.3 V.

flash_i_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I 3.3 V.

fmdd_cmd_i unsigned ( 15 downto 0 ) [Signal]

FMD: Commands.

fmdd_cmd_r unsigned ( 15 downto 0 ) [Signal]

FMD: Commands.

fmdd_stat_r unsigned ( 15 downto 0 ) [Signal]

FMDD status.

gtl_u_i unsigned ( 9 downto 0 ) [Signal]

Cu: 2.5 V Digital driver.

gtl_u_r unsigned ( 9 downto 0 ) [Signal]

Cu: 2.5 V Digital driver.

gtl_u_th_i unsigned ( 9 downto 0 ) [Signal]

Th: 2.5 V Digital driver.

gtl_u_th_r unsigned ( 9 downto 0 ) [Signal]

Th: 2.5 V Digital driver.

hold_wait_i unsigned ( 15 downto 0 ) [Signal]

FMD: Wait to hold.

hold_wait_r unsigned ( 15 downto 0 ) [Signal]

FMD: Wait to hold.

ints_i std_logic_vector ( 4 downto 0 ) [Signal]

l0cnt_i unsigned ( 15 downto 0 ) [Signal]

L0 counters.

l0cnt_r unsigned ( 15 downto 0 ) [Signal]

L0 counters.

l1_timeout_i unsigned ( 15 downto 0 ) [Signal]

FMD: L1 timeout.

l1_timeout_r unsigned ( 15 downto 0 ) [Signal]

FMD: L1 timeout.

l1cnt_i unsigned ( 15 downto 0 ) [Signal]

L1 counter.

l1cnt_r unsigned ( 15 downto 0 ) [Signal]

L1 counter.

l2_timeout_i unsigned ( 15 downto 0 ) [Signal]

FMD: L2 timeout.

l2_timeout_r unsigned ( 15 downto 0 ) [Signal]

FMD: L2 timeout.

l2cnt_i unsigned ( 15 downto 0 ) [Signal]

L2 counter.

l2cnt_r unsigned ( 15 downto 0 ) [Signal]

L2 counter.

meb_cnt_i unsigned ( 3 downto 0 ) [Signal]

meb_r unsigned ( 8 downto 0 ) [Signal]

MEB config.

mebs_i unsigned ( 4 downto 0 ) [Signal]

MEB config.

old_end_cnv_i std_logic [Signal]

sample_div_i unsigned ( 15 downto 0 ) [Signal]

FMD: Sample clk.

sample_div_r unsigned ( 15 downto 0 ) [Signal]

FMD: Sample clk.

sclkcnt_i unsigned ( 15 downto 0 ) [Signal]

Slow clock counter.

sclkcnt_r unsigned ( 15 downto 0 ) [Signal]

Slow clock counter.

shape_bias_i unsigned ( 15 downto 0 ) [Signal]

FMD: Shape bias.

shape_bias_r unsigned ( 15 downto 0 ) [Signal]

FMD: Shape bias.

shift_div_i unsigned ( 15 downto 0 ) [Signal]

FMD: Shift clk.

shift_div_r unsigned ( 15 downto 0 ) [Signal]

FMD: Shift clk.

strips_i unsigned ( 15 downto 0 ) [Signal]

FMD: Strips.

strips_r unsigned ( 15 downto 0 ) [Signal]

FMD: Strips.

t1_i unsigned ( 9 downto 0 ) [Signal]

Cu: First ADC T.

t1_r unsigned ( 9 downto 0 ) [Signal]

Cu: First ADC T.

t1_th_i unsigned ( 9 downto 0 ) [Signal]

Th: First ADC T.

t1_th_r unsigned ( 9 downto 0 ) [Signal]

Th: First ADC T.

t1sens_i unsigned ( 9 downto 0 ) [Signal]

Cu: Temperature sens. 1.

t1sens_r unsigned ( 9 downto 0 ) [Signal]

Cu: Temperature sens. 1.

t1sens_th_i unsigned ( 9 downto 0 ) [Signal]

Th: Temperature sens. 1.

t1sens_th_r unsigned ( 9 downto 0 ) [Signal]

Th: Temperature sens. 1.

t2_i unsigned ( 9 downto 0 ) [Signal]

Cu: Second ADC T.

t2_r unsigned ( 9 downto 0 ) [Signal]

Cu: Second ADC T.

t2_th_i unsigned ( 9 downto 0 ) [Signal]

Th: Second ADC T.

t2_th_r unsigned ( 9 downto 0 ) [Signal]

Th: Second ADC T.

t2sens_i unsigned ( 9 downto 0 ) [Signal]

Cu: Temperature sens. 2.

t2sens_r unsigned ( 9 downto 0 ) [Signal]

Cu: Temperature sens. 2.

t2sens_th_i unsigned ( 9 downto 0 ) [Signal]

Th: Temperature sens. 2.

t2sens_th_r unsigned ( 9 downto 0 ) [Signal]

Th: Temperature sens. 2.

t3_i unsigned ( 9 downto 0 ) [Signal]

Cu: Third ADC T.

t3_r unsigned ( 9 downto 0 ) [Signal]

Cu: Third ADC T.

t3_th_i unsigned ( 9 downto 0 ) [Signal]

Th: Third ADC T.

t3_th_r unsigned ( 9 downto 0 ) [Signal]

Th: Third ADC T.

t4_i unsigned ( 9 downto 0 ) [Signal]

Cu: Forth ADC T.

t4_r unsigned ( 9 downto 0 ) [Signal]

Cu: Forth ADC T.

t4_th_i unsigned ( 9 downto 0 ) [Signal]

Th: Forth ADC T.

t4_th_r unsigned ( 9 downto 0 ) [Signal]

Th: Forth ADC T.

tsm_word_i unsigned ( 8 downto 0 ) [Signal]

Test mode words.

tsm_word_r unsigned ( 8 downto 0 ) [Signal]

Test mode words.

us_ratio_i unsigned ( 15 downto 0 ) := ( others = > ' 0 ' ) [Signal]

us_ratio_r unsigned ( 15 downto 0 ) [Signal]

Under sampling ratio.

va_rec_im_i unsigned ( 9 downto 0 ) [Signal]

Cu: I -2.0 V.

va_rec_im_r unsigned ( 9 downto 0 ) [Signal]

Cu: I -2.0 V.

va_rec_im_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I -2.0 V.

va_rec_im_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I -2.0 V.

va_rec_ip_i unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V VA.

va_rec_ip_r unsigned ( 9 downto 0 ) [Signal]

Cu: I 2.5 V VA.

va_rec_ip_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V VA.

va_rec_ip_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I 2.5 V VA.

va_rec_um_i unsigned ( 9 downto 0 ) [Signal]

Cu: U -2.0 (m).

va_rec_um_r unsigned ( 9 downto 0 ) [Signal]

Cu: U -2.0 (m).

va_rec_um_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U -2.0 (m).

va_rec_um_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U -2.0 (m).

va_rec_up_i unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 VA (m).

va_rec_up_r unsigned ( 9 downto 0 ) [Signal]

Cu: U 2.5 VA (m).

va_rec_up_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 VA (m).

va_rec_up_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U 2.5 VA (m).

va_sup_im_i unsigned ( 9 downto 0 ) [Signal]

Cu: I -2.0 V VA.

va_sup_im_r unsigned ( 9 downto 0 ) [Signal]

Cu: I -2.0 V VA.

va_sup_im_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I -2.0 V VA.

va_sup_im_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I -2.0 V VA.

va_sup_ip_i unsigned ( 9 downto 0 ) [Signal]

Cu: I 1.5 V VA.

va_sup_ip_r unsigned ( 9 downto 0 ) [Signal]

Cu: I 1.5 V VA.

va_sup_ip_th_i unsigned ( 9 downto 0 ) [Signal]

Th: I 1.5 V VA.

va_sup_ip_th_r unsigned ( 9 downto 0 ) [Signal]

Th: I 1.5 V VA.

va_sup_um_i unsigned ( 9 downto 0 ) [Signal]

Cu: U -2.0 VA (m).

va_sup_um_r unsigned ( 9 downto 0 ) [Signal]

Cu: U -2.0 VA (m).

va_sup_um_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U -2.0 VA (m).

va_sup_um_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U -2.0 VA (m).

va_sup_up_i unsigned ( 9 downto 0 ) [Signal]

Cu: U 1.5 VA (m).

va_sup_up_r unsigned ( 9 downto 0 ) [Signal]

Cu: U 1.5 VA (m).

va_sup_up_th_i unsigned ( 9 downto 0 ) [Signal]

Th: U 1.5 VA (m).

va_sup_up_th_r unsigned ( 9 downto 0 ) [Signal]

Th: U 1.5 VA (m).

vfp_i unsigned ( 15 downto 0 ) [Signal]

FMD: Preamp ref.

vfp_r unsigned ( 15 downto 0 ) [Signal]

FMD: Preamp ref.

vfs_i unsigned ( 15 downto 0 ) [Signal]

FMD: Shape ref.

vfs_r unsigned ( 15 downto 0 ) [Signal]

FMD: Shape ref.

The documentation for this class was generated from the following file:

bc/bc_core/registers/registers_block/registers_block.vhd

rtl Architecture Reference

Functions

Processes

Signals

Member Function Documentation

Member Data Documentation