rcu_misc_pack Package Reference

Collaboration diagram for rcu_misc_pack:
Collaboration graph
[legend]

List of all members.



Package Body >> rcu_misc_pack

Functions

string  padstr ( constant what: in string )
std_logic  parity ( constant x: in std_logic_vector )
std_logic_vector  int2slv ( val: in integer , width: in positive )
string  slv2str ( input: in std_logic_vector )

Procedures

 bus_raw_rw(
constant data: in std_logic_vector ( 19 downto 0 )
constant addr: in std_logic_vector ( 39 downto 20 )
constant rw: in std_logic
signal bd: out std_logic_vector ( 39 downto 0 )
signal writ: out std_logic
signal cstb: out std_logic
signal rclk: in std_logic
signal ackn: in std_logic
)
 bus_rw(
constant rw: in character
constant bcast: in std_logic
constant branch: in std_logic
constant board: in std_logic_vector ( 3 downto 0 )
constant chip: in std_logic_vector ( 2 downto 0 )
constant channel: in std_logic_vector ( 3 downto 0 )
constant what: in bus_const_t
constant data: in std_logic_vector ( 19 downto 0 )
signal bd: out std_logic_vector ( 39 downto 0 )
signal writ: out std_logic
signal cstb: out std_logic
signal clk: in std_logic
signal ackn: in std_logic
)
 bus_send(
constant name: in string ( 7 downto 1 )
constant rw: in character
constant bcast: in std_logic
constant branch: in std_logic
constant board: in std_logic_vector ( 3 downto 0 )
constant chip: in std_logic_vector ( 2 downto 0 )
constant channel: in std_logic_vector ( 3 downto 0 )
constant data: in std_logic_vector ( 19 downto 0 )
signal bd: out std_logic_vector ( 39 downto 0 )
signal writ: out std_logic
signal cstb: out std_logic
signal clk: in std_logic
signal ackn: in std_logic
)
 wait_for_trsf(
signal rclk: in std_logic
signal trsf: in std_logic
signal bd: in out std_logic_vector ( 39 downto 0 )
)
 wait_for_free( signal rclk: in std_logic ,signal ackn: in std_logic )
 spacer( signal rclk: in std_logic )
 exec_command(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in bus_const_t
constant bcast: in std_logic
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 exec_command(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in string
constant bcast: in std_logic
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 exec_commands(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 read_register(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in bus_const_t
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 read_register(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in string
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 read_registers(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 write_register(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in bus_const_t
constant data: in integer
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 write_register(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
constant what: in string
constant data: in integer
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 write_registers(
constant hadd: in std_logic_vector ( 4 downto 0 ) := " 00000 "
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)
 make_trig(
constant l0_delay: in time
constant l1_delay: in time
constant l2_delay: in time
constant l0_len: in time
constant l1_len: in time
constant l2_len: in time
signal l0: out std_logic
signal l1: out std_logic
signal l2: out std_logic
signal name: out string ( 7 downto 1 )
)
 make_trigger(
signal l0: out std_logic
signal l1: out std_logic
signal l2: out std_logic
signal name: out string ( 7 downto 1 )
)
 rpinc(
signal bd: in out std_logic_vector ( 39 downto 0 )
signal cstb: out std_logic
signal writ: out std_logic
signal ackn: in std_logic
signal trsf: in std_logic
signal rclk: in std_logic
signal name: out string ( 7 downto 1 )
)

Libraries

ieee 

Packages

std_logic_1164 
numeric_std 

Components

clocker  <Entity clocker>
reseter  <Entity reseter>

Constants

L0_DELAY  time := 1.2 us
bus_default  bus_const_t := ( " _______ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#00# )
bc_instructions  bus_const_array_t ( 127 downto 0 ) := ( 0 = > ( " ZERO___ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#00# ) , 1 = > ( " T1_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#01# ) , 2 = > ( " FLASITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#02# ) , 3 = > ( " ALDIITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#03# ) , 4 = > ( " ALANITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#04# ) , 5 = > ( " VARIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#05# ) , 6 = > ( " T1_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#06# ) , 7 = > ( " FLASI__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#07# ) , 8 = > ( " ALDII__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#08# ) , 9 = > ( " ALANI__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#09# ) , 10 = > ( " VARIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0A# ) , 11 = > ( " L1CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0B# ) , 12 = > ( " L2CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0C# ) , 13 = > ( " SCLKCNT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0D# ) , 14 = > ( " DSTBCNT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0E# ) , 15 = > ( " TSMWORD " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#0F# ) , 16 = > ( " USRATIO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#10# ) , 17 = > ( " CSR0___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#11# ) , 18 = > ( " CSR1___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#12# ) , 19 = > ( " CSR2___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#13# ) , 20 = > ( " CSR3___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#14# ) , 21 = > ( " FREE___ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#15# ) , 22 = > ( " CNTLAT_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#16# ) , 23 = > ( " CNTCLR_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#17# ) , 24 = > ( " CSR1CLR " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#18# ) , 25 = > ( " ALRST__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#19# ) , 26 = > ( " BCRST__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1A# ) , 27 = > ( " STCNV__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1B# ) , 28 = > ( " SCEVL__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1C# ) , 29 = > ( " EVLRDO_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1D# ) , 30 = > ( " STTSM__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1E# ) , 31 = > ( " ACQRDO_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1F# ) , 32 = > ( " FMDSTAT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#20# ) , 33 = > ( " L0CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#21# ) , 34 = > ( " HOLD_WA " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#22# ) , 35 = > ( " L1_TIMO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#23# ) , 36 = > ( " L2_TIMO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#24# ) , 37 = > ( " SHIFTCL " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#25# ) , 38 = > ( " STRIPS_ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#26# ) , 39 = > ( " CAL_LVL " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#27# ) , 40 = > ( " SHAPE_B " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#28# ) , 41 = > ( " VFS____ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#29# ) , 42 = > ( " VFP____ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2A# ) , 43 = > ( " SAMPLEC " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2B# ) , 44 = > ( " FMDDCMD " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#2C# ) , 45 = > ( " T2_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2D# ) , 46 = > ( " VASIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2E# ) , 47 = > ( " VARIMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2F# ) , 48 = > ( " VASIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#30# ) , 49 = > ( " GTLU_TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#31# ) , 50 = > ( " T2_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#32# ) , 51 = > ( " VASIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#33# ) , 52 = > ( " VARIM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#34# ) , 53 = > ( " VASIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#35# ) , 54 = > ( " GTLU___ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#36# ) , 55 = > ( " T3_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#37# ) , 56 = > ( " TEMP1TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#38# ) , 57 = > ( " TEMP2TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#39# ) , 58 = > ( " ALDIUTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#3A# ) , 59 = > ( " ALANUTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#3B# ) , 60 = > ( " T3_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3C# ) , 61 = > ( " TEMP1__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3D# ) , 62 = > ( " TEMP2__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3E# ) , 63 = > ( " ALDIU__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3F# ) , 64 = > ( " ALANU__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#40# ) , 75 = > ( " T4_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#41# ) , 76 = > ( " VARUPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#42# ) , 77 = > ( " VASUPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#43# ) , 78 = > ( " VASUMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#44# ) , 79 = > ( " VARUMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#45# ) , 80 = > ( " T4_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#46# ) , 81 = > ( " VARUP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#47# ) , 82 = > ( " VASUP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#48# ) , 83 = > ( " VASUM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#49# ) , 84 = > ( " VARUM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#4A# ) , 85 = > ( " CALITER " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#4B# ) , 86 = > ( " MEBS___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#4C# ) , 87 = > ( " RPINC__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 0 ' , 16#19# ) , others = > bus_default )
cmd_change_dac  integer := 0
cmd_trigger  integer := 1
cmd_l0  integer := 2
cmd_reset  integer := 3
cmd_calib_on  integer := 4
cmd_calib_off  integer := 5
cmd_list  cmd_list_t := ( cmd_change_dac = > ( X " 0001 " , " CHDAC " ) , cmd_trigger = > ( X " 0002 " , " TRIGS " ) , cmd_l0 = > ( X " 0004 " , " TRIG0 " ) , cmd_reset = > ( X " 0008 " , " RESET " ) , cmd_calib_on = > ( X " 0010 " , " CALON " ) , cmd_calib_off = > ( X " 0020 " , " CALOF " ) , others = > ( X " 0000 " , " ----- " ) )

Types

bus_const_array_t  array ( natural range<> ) of bus_const_t
cmd_list_t  array ( 0 to 15 ) of cmd_t

Records

bus_const_t : record 
name string ( 7 downto 1 )
writ std_logic
read std_logic
bcast std_logic
bcal std_logic
code integer
cmd_t : record 
code std_logic_vector ( 15 downto 0 )
name string ( 5 downto 1 )

Member Function Documentation

[Procedure]
bus_raw_rw (constant data in std_logic_vector(19 downto 0) ,
constant addr in std_logic_vector(39 downto 20) ,
constant rw in std_logic ,
signal bd out std_logic_vector(39 downto 0) ,
signal writ out std_logic ,
signal cstb out std_logic ,
signal rclk in std_logic ,
signal ackn in std_logic )
[Procedure]
bus_rw (constant rw in character ,
constant bcast in std_logic ,
constant branch in std_logic ,
constant board in std_logic_vector(3 downto 0) ,
constant chip in std_logic_vector(2 downto 0) ,
constant channel in std_logic_vector(3 downto 0) ,
constant what in bus_const_t ,
constant data in std_logic_vector(19 downto 0) ,
signal bd out std_logic_vector(39 downto 0) ,
signal writ out std_logic ,
signal cstb out std_logic ,
signal clk in std_logic ,
signal ackn in std_logic )
[Procedure]
bus_send (constant name in string(7 downto 1) ,
constant rw in character ,
constant bcast in std_logic ,
constant branch in std_logic ,
constant board in std_logic_vector(3 downto 0) ,
constant chip in std_logic_vector(2 downto 0) ,
constant channel in std_logic_vector(3 downto 0) ,
constant data in std_logic_vector(19 downto 0) ,
signal bd out std_logic_vector(39 downto 0) ,
signal writ out std_logic ,
signal cstb out std_logic ,
signal clk in std_logic ,
signal ackn in std_logic )
[Procedure]
exec_command (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in string ,
constant bcast in std_logic ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
exec_command (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in bus_const_t ,
constant bcast in std_logic ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
exec_commands (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Function]
std_logic_vector int2slv ( val in integer ,
width in positive )
[Procedure]
make_trig (constant L0_DELAY in time ,
constant l1_delay in time ,
constant l2_delay in time ,
constant l0_len in time ,
constant l1_len in time ,
constant l2_len in time ,
signal l0 out std_logic ,
signal l1 out std_logic ,
signal l2 out std_logic ,
signal name out string(7 downto 1) )
[Procedure]
make_trigger (signal l0 out std_logic ,
signal l1 out std_logic ,
signal l2 out std_logic ,
signal name out string(7 downto 1) )
[Function]
string padstr (constant what in string )
[Function]
std_logic parity (constant x in std_logic_vector )
[Procedure]
read_register (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in string ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
read_register (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in bus_const_t ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
read_registers (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
rpinc (signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Function]
string slv2str ( input in std_logic_vector )
[Procedure]
spacer (signal rclk in std_logic )
[Procedure]
wait_for_free (signal rclk in std_logic ,
signal ackn in std_logic )
[Procedure]
wait_for_trsf (signal rclk in std_logic ,
signal trsf in std_logic ,
signal bd in out std_logic_vector(39 downto 0) )
[Procedure]
write_register (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in string ,
constant data in integer ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
write_register (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
constant what in bus_const_t ,
constant data in integer ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )
[Procedure]
write_registers (constant hadd in std_logic_vector(4 downto 0):= "00000" ,
signal bd in out std_logic_vector(39 downto 0) ,
signal cstb out std_logic ,
signal writ out std_logic ,
signal ackn in std_logic ,
signal trsf in std_logic ,
signal rclk in std_logic ,
signal name out string(7 downto 1) )

Member Data Documentation

read std_logic [Record]
bcast std_logic [Record]
bcal std_logic [Record]
code integer [Record]
code std_logic_vector ( 15 downto 0 ) [Record]
name string ( 5 downto 1 ) [Record]
name string ( 7 downto 1 ) [Record]
writ std_logic [Record]
bc_instructions bus_const_array_t ( 127 downto 0 ) := ( 0 = > ( " ZERO___ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#00# ) , 1 = > ( " T1_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#01# ) , 2 = > ( " FLASITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#02# ) , 3 = > ( " ALDIITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#03# ) , 4 = > ( " ALANITH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#04# ) , 5 = > ( " VARIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#05# ) , 6 = > ( " T1_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#06# ) , 7 = > ( " FLASI__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#07# ) , 8 = > ( " ALDII__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#08# ) , 9 = > ( " ALANI__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#09# ) , 10 = > ( " VARIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0A# ) , 11 = > ( " L1CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0B# ) , 12 = > ( " L2CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0C# ) , 13 = > ( " SCLKCNT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0D# ) , 14 = > ( " DSTBCNT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#0E# ) , 15 = > ( " TSMWORD " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#0F# ) , 16 = > ( " USRATIO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#10# ) , 17 = > ( " CSR0___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#11# ) , 18 = > ( " CSR1___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#12# ) , 19 = > ( " CSR2___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#13# ) , 20 = > ( " CSR3___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#14# ) , 21 = > ( " FREE___ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#15# ) , 22 = > ( " CNTLAT_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#16# ) , 23 = > ( " CNTCLR_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#17# ) , 24 = > ( " CSR1CLR " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#18# ) , 25 = > ( " ALRST__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#19# ) , 26 = > ( " BCRST__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1A# ) , 27 = > ( " STCNV__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1B# ) , 28 = > ( " SCEVL__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1C# ) , 29 = > ( " EVLRDO_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1D# ) , 30 = > ( " STTSM__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1E# ) , 31 = > ( " ACQRDO_ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#1F# ) , 32 = > ( " FMDSTAT " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#20# ) , 33 = > ( " L0CNT__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#21# ) , 34 = > ( " HOLD_WA " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#22# ) , 35 = > ( " L1_TIMO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#23# ) , 36 = > ( " L2_TIMO " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#24# ) , 37 = > ( " SHIFTCL " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#25# ) , 38 = > ( " STRIPS_ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#26# ) , 39 = > ( " CAL_LVL " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#27# ) , 40 = > ( " SHAPE_B " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#28# ) , 41 = > ( " VFS____ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#29# ) , 42 = > ( " VFP____ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2A# ) , 43 = > ( " SAMPLEC " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2B# ) , 44 = > ( " FMDDCMD " , ' 1 ' , ' 0 ' , ' 1 ' , ' 1 ' , 16#2C# ) , 45 = > ( " T2_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2D# ) , 46 = > ( " VASIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2E# ) , 47 = > ( " VARIMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#2F# ) , 48 = > ( " VASIPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#30# ) , 49 = > ( " GTLU_TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#31# ) , 50 = > ( " T2_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#32# ) , 51 = > ( " VASIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#33# ) , 52 = > ( " VARIM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#34# ) , 53 = > ( " VASIP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#35# ) , 54 = > ( " GTLU___ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#36# ) , 55 = > ( " T3_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#37# ) , 56 = > ( " TEMP1TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#38# ) , 57 = > ( " TEMP2TH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#39# ) , 58 = > ( " ALDIUTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#3A# ) , 59 = > ( " ALANUTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#3B# ) , 60 = > ( " T3_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3C# ) , 61 = > ( " TEMP1__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3D# ) , 62 = > ( " TEMP2__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3E# ) , 63 = > ( " ALDIU__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#3F# ) , 64 = > ( " ALANU__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#40# ) , 75 = > ( " T4_TH__ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#41# ) , 76 = > ( " VARUPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#42# ) , 77 = > ( " VASUPTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#43# ) , 78 = > ( " VASUMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#44# ) , 79 = > ( " VARUMTH " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#45# ) , 80 = > ( " T4_____ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#46# ) , 81 = > ( " VARUP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#47# ) , 82 = > ( " VASUP__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#48# ) , 83 = > ( " VASUM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#49# ) , 84 = > ( " VARUM__ " , ' 0 ' , ' 1 ' , ' 0 ' , ' 1 ' , 16#4A# ) , 85 = > ( " CALITER " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#4B# ) , 86 = > ( " MEBS___ " , ' 1 ' , ' 1 ' , ' 1 ' , ' 1 ' , 16#4C# ) , 87 = > ( " RPINC__ " , ' 1 ' , ' 0 ' , ' 1 ' , ' 0 ' , 16#19# ) , others = > bus_default ) [Constant]
bus_const_array_t array ( natural range<> ) of bus_const_t [Type]
bus_const_t [Record]
bus_default bus_const_t := ( " _______ " , ' 0 ' , ' 0 ' , ' 0 ' , ' 0 ' , 16#00# ) [Constant]
clocker [Component]
cmd_calib_off integer := 5 [Constant]
cmd_calib_on integer := 4 [Constant]
cmd_change_dac integer := 0 [Constant]
cmd_l0 integer := 2 [Constant]
cmd_list cmd_list_t := ( cmd_change_dac = > ( X " 0001 " , " CHDAC " ) , cmd_trigger = > ( X " 0002 " , " TRIGS " ) , cmd_l0 = > ( X " 0004 " , " TRIG0 " ) , cmd_reset = > ( X " 0008 " , " RESET " ) , cmd_calib_on = > ( X " 0010 " , " CALON " ) , cmd_calib_off = > ( X " 0020 " , " CALOF " ) , others = > ( X " 0000 " , " ----- " ) ) [Constant]
cmd_list_t array ( 0 to 15 ) of cmd_t [Type]
cmd_reset integer := 3 [Constant]
cmd_t [Record]
cmd_trigger integer := 1 [Constant]
ieee library [Library]
L0_DELAY time := 1.2 us [Constant]
numeric_std package [Package]
reseter [Component]
std_logic_1164 package [Package]
The documentation for this class was generated from the following file:
Generated by  doxygen 1.6.2-20100208