msm_sequencer_rcu Entity Reference

Inheritance diagram for msm_sequencer_rcu:

[legend]

Collaboration diagram for msm_sequencer_rcu:

[legend]

List of all members.

Architectures
rtl	Architecture
Libraries
ieee
Packages
std_logic_1164
numeric_std
Ports
clk	in std_logic
rstb	in std_logic
data_valid	in std_logic
icode	in std_logic_vector ( 1 downto 0 )
error	in std_logic
ready	in std_logic
exec	in std_logic
cnt_rx	in std_logic
data_fbc	in std_logic_vector ( 7 downto 0 )
ih_busy	in std_logic
new_data	out std_logic
read	out std_logic
write	out std_logic
start	out std_logic
stop	out std_logic
seq_active	out std_logic
add_ib	out std_logic_vector ( 2 downto 0 )
we_result	out std_logic
data_result	out std_logic_vector ( 15 downto 0 )

---

Member Data Documentation

add_ib out std_logic_vector ( 2 downto 0 ) [Port]

clk in std_logic [Port]

cnt_rx in std_logic [Port]

data_fbc in std_logic_vector ( 7 downto 0 ) [Port]

data_result out std_logic_vector ( 15 downto 0 ) [Port]

data_valid in std_logic [Port]

error in std_logic [Port]

exec in std_logic [Port]

icode in std_logic_vector ( 1 downto 0 ) [Port]

ieee library [Library]

ih_busy in std_logic [Port]

new_data out std_logic [Port]

numeric_std package [Package]

read out std_logic [Port]

ready in std_logic [Port]

rstb in std_logic [Port]

seq_active out std_logic [Port]

start out std_logic [Port]

std_logic_1164 package [Package]

stop out std_logic [Port]

we_result out std_logic [Port]

write out std_logic [Port]

---

The documentation for this class was generated from the following file:

• msmodule/msm_lsc_core/msm_sequencer_rcu/msm_sequencer_rcu.vhd