msm_lsc_core Entity Reference
Inheritance diagram for msm_lsc_core:
Collaboration diagram for msm_lsc_core:
Architectures | |
| rtl | Architecture |
Libraries | |
| ieee | |
| msmodule_lib | |
Packages | |
| std_logic_1164 | |
| msm_sequencer_rcu_pack | Package <msm_sequencer_rcu_pack> |
| msm_instr_builder_pack | Package <msm_instr_builder_pack> |
| msm_master_pack | Package <msm_master_pack> |
| msm_interrupt_driver_pack | Package <msm_interrupt_driver_pack> |
| msm_mux_signals_pack | Package <msm_mux_signals_pack> |
| msm_sc_signals_pack | Package <msm_sc_signals_pack> |
Ports | |
| clk | in std_logic |
| rstb | in std_logic |
| sda_out | in std_logic |
| sda_ack | in std_logic |
| fec_al | in std_logic_vector ( 31 downto 0 ) |
| rdol | in std_logic_vector ( 31 downto 0 ) |
| exec_dcs | in std_logic |
| bcast_dcs | in std_logic |
| rnw_dcs | in std_logic |
| branch_dcs | in std_logic |
| fec_add_dcs | in std_logic_vector ( 3 downto 0 ) |
| bcreg_add_dcs | in std_logic_vector ( 7 downto 0 ) |
| bcdata_dcs | in std_logic_vector ( 15 downto 0 ) |
| interruptA | in std_logic |
| interruptB | in std_logic |
| dataresult_fsc | out std_logic_vector ( 20 downto 0 ) |
| weresultmaster | out std_logic |
| fec_al_fsc | out std_logic_vector ( 31 downto 0 ) |
| we_fec_al_fsc | out std_logic |
| rdol_fsc | out std_logic_vector ( 31 downto 0 ) |
| we_rdol_fsc | out std_logic |
| addsm | out std_logic_vector ( 4 downto 0 ) |
| sm | out std_logic_vector ( 15 downto 0 ) |
| wesm | out std_logic |
| seq_active | out std_logic |
| sclA | out std_logic |
| sda_inA | out std_logic |
| sclB | out std_logic |
| sda_inB | out std_logic |
| error | out std_logic |
| warningtodcs | out std_logic |
| inta_noten | out std_logic |
| intb_noten | out std_logic |
Member Data Documentation
addsm out std_logic_vector ( 4 downto 0 ) [Port] |
bcast_dcs in std_logic [Port] |
bcdata_dcs in std_logic_vector ( 15 downto 0 ) [Port] |
bcreg_add_dcs in std_logic_vector ( 7 downto 0 ) [Port] |
branch_dcs in std_logic [Port] |
clk in std_logic [Port] |
dataresult_fsc out std_logic_vector ( 20 downto 0 ) [Port] |
error out std_logic [Port] |
exec_dcs in std_logic [Port] |
fec_add_dcs in std_logic_vector ( 3 downto 0 ) [Port] |
fec_al in std_logic_vector ( 31 downto 0 ) [Port] |
fec_al_fsc out std_logic_vector ( 31 downto 0 ) [Port] |
ieee library [Library] |
inta_noten out std_logic [Port] |
intb_noten out std_logic [Port] |
interruptA in std_logic [Port] |
interruptB in std_logic [Port] |
msm_instr_builder_pack package [Package] |
msm_interrupt_driver_pack package [Package] |
msm_master_pack package [Package] |
msm_mux_signals_pack package [Package] |
msm_sc_signals_pack package [Package] |
msm_sequencer_rcu_pack package [Package] |
msmodule_lib library [Library] |
rdol in std_logic_vector ( 31 downto 0 ) [Port] |
rdol_fsc out std_logic_vector ( 31 downto 0 ) [Port] |
rnw_dcs in std_logic [Port] |
rstb in std_logic [Port] |
sclA out std_logic [Port] |
sclB out std_logic [Port] |
sda_ack in std_logic [Port] |
sda_inA out std_logic [Port] |
sda_inB out std_logic [Port] |
sda_out in std_logic [Port] |
seq_active out std_logic [Port] |
sm out std_logic_vector ( 15 downto 0 ) [Port] |
std_logic_1164 package [Package] |
warningtodcs out std_logic [Port] |
we_fec_al_fsc out std_logic [Port] |
we_rdol_fsc out std_logic [Port] |
weresultmaster out std_logic [Port] |
wesm out std_logic [Port] |
The documentation for this class was generated from the following file:
- msmodule/msm_lsc_core/msm_lsc_core.vhd
