ach_clk_div_msm Architecture Reference

Inheritance diagram for ach_clk_div_msm:

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Collaboration diagram for ach_clk_div_msm:

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List of all members.

Processes
PROCESS_18	( rcu_clk , reset )
Signals
count	std_logic_vector ( 2 downto 0 ) := ( others = > ' 1 ' )
count2	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
inv_clk90	std_logic
tmp_clk	std_logic
tmp_clk2	std_logic
tmp_clk3	std_logic
msm2_clk_div_pack	std_logic
tmp_clk4	std_logic

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Member Function Documentation

[Process]

PROCESS_18		( rcu_clk ,
		reset )

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Member Data Documentation

count std_logic_vector ( 2 downto 0 ) := ( others = > ' 1 ' ) [Signal]

count2 std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' ) [Signal]

inv_clk90 std_logic [Signal]

msm2_clk_div_pack std_logic [Signal]

tmp_clk std_logic [Signal]

tmp_clk2 std_logic [Signal]

tmp_clk3 std_logic [Signal]

tmp_clk4 std_logic [Signal]

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The documentation for this class was generated from the following file:

• msmodule2/msm2_interface_i2c/msm2_clk_div/msm2_clk_div.vhd