

Architectures | |
| ach_clk_div_msm | Architecture |
Libraries | |
| ieee | |
Packages | |
| std_logic_1164 | |
Ports | |
| rcu_clk | in std_logic |
| reset | in std_logic |
| enable | in std_logic |
| sclk | out std_logic |
| sclk_90 | out std_logic |
| sclk_270 | out std_logic |
enable in std_logic [Port] |
ieee library [Library] |
rcu_clk in std_logic [Port] |
reset in std_logic [Port] |
sclk out std_logic [Port] |
sclk_270 out std_logic [Port] |
sclk_90 out std_logic [Port] |
std_logic_1164 package [Package] |
1.6.2-20100208