intrdoh Entity Reference
[Model of ALTRO chip]

Inheritance diagram for intrdoh:

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Collaboration diagram for intrdoh:

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List of all members.

Architectures
rtl	Architecture
Libraries
ieee
Packages
std_logic_1164
Ports
clk2	in std_logic
	Clock.
rstb	in std_logic
	Reset.
exrdo	in std_logic
	Execute read-out.
ch_red	in std_logic
	Channel ready (active low).
rdo	out std_logic
	In read-out state.
waitst	out std_logic
	In wait state.
done	out std_logic
	In done state.
h_err	out std_logic
	Error state.
h_abt	out std_logic
	Abort state.

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Detailed Description

Read-out module

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Member Data Documentation

ch_red in std_logic [Port]

Channel ready (active low).

clk2 in std_logic [Port]

Clock.

done out std_logic [Port]

In done state.

exrdo in std_logic [Port]

Execute read-out.

h_abt out std_logic [Port]

Abort state.

h_err out std_logic [Port]

Error state.

ieee library [Library]

rdo out std_logic [Port]

In read-out state.

rstb in std_logic [Port]

Reset.

std_logic_1164 package [Package]

waitst out std_logic [Port]

In wait state.

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The documentation for this class was generated from the following file:

• altro/intrdoh.vhd