interface Entity Reference
Inheritance diagram for interface:
Collaboration diagram for interface:
Architectures | |
| rtl | Architecture |
Libraries | |
| ieee | |
| altro_model | |
Packages | |
| std_logic_1164 | |
| intdec_pack | Package <intdec_pack> |
| intexec_pack | Package <intexec_pack> |
| intctrl_pack | Package <intctrl_pack> |
| busint_pack | Package <busint_pack> |
| sync21_pack | Package <sync21_pack> |
Ports | |
| clk | in std_logic |
| clk2 | in std_logic |
| rstb | in std_logic |
| ch_red | in std_logic |
| hadd | in std_logic_vector ( 7 downto 0 ) |
| bd | in std_logic_vector ( 39 downto 0 ) |
| cstb | in std_logic |
| wrt | in std_logic |
| trgi | in std_logic |
| twx | in std_logic |
| h_abt | out std_logic |
| h_err | out std_logic |
| chrdo | out std_logic |
| ack | out std_logic |
| ack_en | out std_logic |
| dolo_en | out std_logic |
| trsf_en | out std_logic |
| trg_overlap | out std_logic |
| csr_wr | out std_logic |
| push | out std_logic |
| pop | out std_logic |
| trg | out std_logic |
| trc_clr | out std_logic |
| err_clr | out std_logic |
| wr_bsl | out std_logic |
| rd_bsl | out std_logic |
| instr_err | out std_logic |
| bcast | out std_logic |
| chadd | out std_logic_vector ( 3 downto 0 ) |
| csr_sel | out std_logic_vector ( 4 downto 0 ) |
| hadd_o | out std_logic_vector ( 7 downto 0 ) |
| csr_do | out std_logic_vector ( 19 downto 0 ) |
| par_err | out std_logic |
| l2y | in std_logic |
| tstout | out std_logic |
Member Data Documentation
ack out std_logic [Port] |
ack_en out std_logic [Port] |
altro_model library [Library] |
bcast out std_logic [Port] |
bd in std_logic_vector ( 39 downto 0 ) [Port] |
busint_pack package [Package] |
ch_red in std_logic [Port] |
chadd out std_logic_vector ( 3 downto 0 ) [Port] |
chrdo out std_logic [Port] |
clk in std_logic [Port] |
clk2 in std_logic [Port] |
csr_do out std_logic_vector ( 19 downto 0 ) [Port] |
csr_sel out std_logic_vector ( 4 downto 0 ) [Port] |
csr_wr out std_logic [Port] |
cstb in std_logic [Port] |
dolo_en out std_logic [Port] |
err_clr out std_logic [Port] |
h_abt out std_logic [Port] |
h_err out std_logic [Port] |
hadd in std_logic_vector ( 7 downto 0 ) [Port] |
hadd_o out std_logic_vector ( 7 downto 0 ) [Port] |
ieee library [Library] |
instr_err out std_logic [Port] |
intctrl_pack package [Package] |
intdec_pack package [Package] |
intexec_pack package [Package] |
l2y in std_logic [Port] |
par_err out std_logic [Port] |
pop out std_logic [Port] |
push out std_logic [Port] |
rd_bsl out std_logic [Port] |
rstb in std_logic [Port] |
std_logic_1164 package [Package] |
sync21_pack package [Package] |
trc_clr out std_logic [Port] |
trg out std_logic [Port] |
trg_overlap out std_logic [Port] |
trgi in std_logic [Port] |
trsf_en out std_logic [Port] |
tstout out std_logic [Port] |
twx in std_logic [Port] |
wr_bsl out std_logic [Port] |
wrt in std_logic [Port] |
The documentation for this class was generated from the following file:
- altro/interface.vhd
