glitchf Entity Reference
[Model of ALTRO chip]
Inheritance diagram for glitchf:
Collaboration diagram for glitchf:
Architectures | |
| rtl | Architecture |
Libraries | |
| ieee | |
Packages | |
| std_logic_1164 | |
Ports | |
| x2 | in std_logic |
| clk | in std_logic |
| rstb | in std_logic |
| x1 | out std_logic |
Detailed Description
A glitch filter
This filer insist on the input x2 to be stable for at least 3 clock cycles, and then changes the output x1
Member Data Documentation
clk in std_logic [Port] |
ieee library [Library] |
rstb in std_logic [Port] |
std_logic_1164 package [Package] |
x1 out std_logic [Port] |
x2 in std_logic [Port] |
The documentation for this class was generated from the following file:
- altro/glitchf.vhd
