cal_manager Entity Reference

Inheritance diagram for cal_manager:

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Collaboration diagram for cal_manager:

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List of all members.

Architectures
rtl	Architecture
Libraries
ieee
Packages
std_logic_1164
numeric_std
Ports
clk	in std_logic
	Clock.
rstb	in std_logic
	Reset.
enable	in std_logic
	Start pulser mode.
busy	out std_logic
	We're active.
clear_seq	out std_logic
	Reset VA shift reg.
l2	in std_logic
	L2 trigger.
iterations	in std_logic_vector ( 15 downto 0 )
	Number of iterations.
step	in std_logic_vector ( 7 downto 0 )
	Step size.
strip_min	in std_logic_vector ( 7 downto 0 )
	Min strip.
strip_max	in std_logic_vector ( 7 downto 0 )
	Max strip.
strip	out std_logic_vector ( 7 downto 0 )
	output strip no
pulse	out std_logic_vector ( 7 downto 0 )
	Pulse size.
change	out std_logic
change_busy	in std_logic

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Member Data Documentation

busy out std_logic [Port]

We're active.

change out std_logic [Port]

change_busy in std_logic [Port]

clear_seq out std_logic [Port]

Reset VA shift reg.

clk in std_logic [Port]

Clock.

enable in std_logic [Port]

Start pulser mode.

ieee library [Library]

iterations in std_logic_vector ( 15 downto 0 ) [Port]

Number of iterations.

l2 in std_logic [Port]

L2 trigger.

numeric_std package [Package]

pulse out std_logic_vector ( 7 downto 0 ) [Port]

Pulse size.

rstb in std_logic [Port]

Reset.

std_logic_1164 package [Package]

step in std_logic_vector ( 7 downto 0 ) [Port]

Step size.

strip out std_logic_vector ( 7 downto 0 ) [Port]

output strip no

strip_max in std_logic_vector ( 7 downto 0 ) [Port]

Max strip.

strip_min in std_logic_vector ( 7 downto 0 ) [Port]

Min strip.

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The documentation for this class was generated from the following file:

• bc/fmdd/cal_manager/cal_manager.vhd