busint Entity Reference
[Model of ALTRO chip]

Inheritance diagram for busint:

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Collaboration diagram for busint:

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List of all members.

Architectures
rtl	Architecture
Libraries
ieee
altro_model
Packages
std_logic_1164
glitchf_pack	Package <glitchf_pack>
sync221_pack	Package <sync221_pack>
Ports
l2y_i	in std_logic
	L2 accept.
load	in std_logic
	Load data.
hadd	in std_logic_vector ( 7 downto 0 )
	hardware address
bd	in std_logic_vector ( 39 downto 0 )
	bidirectional bus
wrt	in std_logic
	Write enable.
trg	in std_logic
	trigger
clk	in std_logic
	clk2
clk2	in std_logic
	clock 2
rstb	in std_logic
	reset
hadd_r	out std_logic_vector ( 7 downto 0 )
	hardware address
add_r	out std_logic_vector ( 19 downto 0 )
	return of address
data_r	out std_logic_vector ( 19 downto 0 )
	data output
write_r	out std_logic
	write return
trg_r	out std_logic
	trigger return
l2y_r	out std_logic
	l2 accept return
cs	out std_logic
	Card select.
loadcs	in std_logic
	Check address.

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Detailed Description

Bus interface

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Member Data Documentation

add_r out std_logic_vector ( 19 downto 0 ) [Port]

return of address

altro_model library [Library]

bd in std_logic_vector ( 39 downto 0 ) [Port]

bidirectional bus

clk in std_logic [Port]

clk2

clk2 in std_logic [Port]

clock 2

cs out std_logic [Port]

Card select.

data_r out std_logic_vector ( 19 downto 0 ) [Port]

data output

glitchf_pack package [Package]

hadd in std_logic_vector ( 7 downto 0 ) [Port]

hardware address

hadd_r out std_logic_vector ( 7 downto 0 ) [Port]

hardware address

ieee library [Library]

l2y_i in std_logic [Port]

L2 accept.

l2y_r out std_logic [Port]

l2 accept return

load in std_logic [Port]

Load data.

loadcs in std_logic [Port]

Check address.

rstb in std_logic [Port]

reset

std_logic_1164 package [Package]

sync221_pack package [Package]

trg in std_logic [Port]

trigger

trg_r out std_logic [Port]

trigger return

write_r out std_logic [Port]

write return

wrt in std_logic [Port]

Write enable.

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The documentation for this class was generated from the following file:

• altro/busint.vhd