| mem_rdaddr_i | rtl | [Signal] |
| mem_rdaddr_ii | rtl | [Signal] |
| mem_reader | rtl | [Component Instantiation] |
| mem_wraddr_i | rtl | [Signal] |
| mem_wraddr_ii | rtl | [Signal] |
| mem_wren_i | rtl | [Signal] |
| mem_wren_ii | rtl | [Signal] |
| mem_writer | rtl | [Component Instantiation] |
| nedge_detect(clk, rstb) | rtl | [Process] |
| ram(clk, rstb) | rtl | [Process] |
| ram_i | rtl | [Signal] |
| ram_in_i | rtl | [Signal] |
| ram_t | rtl | [Type] |
| sclk_edge_i | rtl | [Signal] |
| sclk_i | rtl | [Signal] |
| sclk_ii | rtl | [Signal] |
| tsm_acqon_i | rtl | [Signal] |
1.6.2-20100208