Architectures | |
rtl | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
Ports | |
sc_add | in std_logic_vector ( 15 downto 0 ) |
sc_data | in std_logic_vector ( 15 downto 0 ) |
sc_exec | in std_logic |
exec_in | out std_logic |
branch | out std_logic |
bcast | out std_logic |
rnw | out std_logic |
fec_add | out std_logic_vector ( 3 downto 0 ) |
bcreg_add | out std_logic_vector ( 7 downto 0 ) |
bc_data | out std_logic_vector ( 15 downto 0 ) |
bc_data out std_logic_vector ( 15 downto 0 ) [Port] |
bcast out std_logic [Port] |
bcreg_add out std_logic_vector ( 7 downto 0 ) [Port] |
branch out std_logic [Port] |
exec_in out std_logic [Port] |
fec_add out std_logic_vector ( 3 downto 0 ) [Port] |
ieee library [Library] |
rnw out std_logic [Port] |
sc_add in std_logic_vector ( 15 downto 0 ) [Port] |
sc_data in std_logic_vector ( 15 downto 0 ) [Port] |
sc_exec in std_logic [Port] |
std_logic_1164 package [Package] |