msm2_sipo Entity Reference

Inheritance diagram for msm2_sipo:

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Collaboration diagram for msm2_sipo:

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List of all members.

Architectures
arch_sipo	Architecture
Libraries
IEEE
Packages
std_logic_1164
Generics
reg_wid	integer := 8
Ports
CLK	in std_logic
rst	in std_logic
SE	in std_logic
SI	in std_logic
SO	out std_logic
DOUT	out std_logic_vector ( ( reg_wid -1 ) downto 0 )

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Member Data Documentation

CLK in std_logic [Port]

DOUT out std_logic_vector ( ( reg_wid -1 ) downto 0 ) [Port]

IEEE library [Library]

reg_wid integer := 8 [Generic]

rst in std_logic [Port]

SE in std_logic [Port]

SI in std_logic [Port]

SO out std_logic [Port]

std_logic_1164 package [Package]

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The documentation for this class was generated from the following file:

• msmodule2/msm2_interface_i2c/msm2_sipo/msm2_sipo.vhd