Architectures | |
ARCH_MSM | Architecture |
Libraries | |
IEEE | |
msmodule2_lib | |
Packages | |
STD_LOGIC_1164 | |
msm2_interface_i2c_pack | Package <msm2_interface_i2c_pack> |
msm2_decoder_pack | Package <msm2_decoder_pack> |
Ports | |
rst | in std_logic |
clk | in std_logic |
wen_dcs | in std_logic |
addr_dcs | in std_logic_vector ( 15 downto 0 ) |
data_dcs | in std_logic_vector ( 31 downto 0 ) |
dat_out_dcs | out std_logic_vector ( 31 downto 0 ) |
fec_act_list | in std_logic_vector ( 31 downto 0 ) |
rcu_version | in std_logic_vector ( 31 downto 0 ) |
err_reg_a | in std_logic_vector ( 31 downto 0 ) |
err_reg_b | in std_logic_vector ( 31 downto 0 ) |
sda_in_A | in std_logic |
sda_out_A | out std_logic |
s_clk_A | out std_logic |
interruptA_in | in std_logic |
warningTOdcs | out std_logic |
interruptB_in | in std_logic |
sda_in_B | in std_logic |
sda_out_B | out std_logic |
s_clk_B | out std_logic |
addr_dcs in std_logic_vector ( 15 downto 0 ) [Port] |
clk in std_logic [Port] |
dat_out_dcs out std_logic_vector ( 31 downto 0 ) [Port] |
data_dcs in std_logic_vector ( 31 downto 0 ) [Port] |
err_reg_a in std_logic_vector ( 31 downto 0 ) [Port] |
err_reg_b in std_logic_vector ( 31 downto 0 ) [Port] |
fec_act_list in std_logic_vector ( 31 downto 0 ) [Port] |
IEEE library [Library] |
interruptA_in in std_logic [Port] |
interruptB_in in std_logic [Port] |
msm2_decoder_pack package [Package] |
msm2_interface_i2c_pack package [Package] |
msmodule2_lib library [Library] |
rcu_version in std_logic_vector ( 31 downto 0 ) [Port] |
rst in std_logic [Port] |
s_clk_A out std_logic [Port] |
s_clk_B out std_logic [Port] |
sda_in_A in std_logic [Port] |
sda_in_B in std_logic [Port] |
sda_out_A out std_logic [Port] |
sda_out_B out std_logic [Port] |
STD_LOGIC_1164 package [Package] |
warningTOdcs out std_logic [Port] |
wen_dcs in std_logic [Port] |