msm2_inthandler Entity Reference

Inheritance diagram for msm2_inthandler:

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Collaboration diagram for msm2_inthandler:

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List of all members.

Architectures
ARCH_int_hanlder	Architecture
Libraries
IEEE
msmodule2_lib
Packages
STD_LOGIC_1164
numeric_std
msm2_cnt16_pack
msm2_cnt_fec_pack	Package <msm2_cnt_fec_pack>
msm2_err_hndl_pack	Package <msm2_err_hndl_pack>
msm2_fsm_int_hndl_pack
Ports
clk	in std_logic
rst	in std_logic
intr_in	in std_logic
i2c_bsy	in std_logic
end_rd	in std_logic
en_mem	in std_logic
set_act	in std_logic
set_rdo	in std_logic
sv_fec_add	in std_logic
confg_err	in std_logic_vector ( 7 downto 0 )
addr_dcs	in std_logic_vector ( 15 downto 0 )
rslt_reg	in std_logic_vector ( 15 downto 0 )
dout_dcs	out std_logic_vector ( 15 downto 0 )
fec_act_list	in std_logic_vector ( 15 downto 0 )
fec_rdo_list	in std_logic_vector ( 15 downto 0 )
ih_act_list	out std_logic_vector ( 15 downto 0 )
ih_rdo_list	out std_logic_vector ( 15 downto 0 )
warn_dcs	out std_logic
bsy_to_dcs	out std_logic
sel_add_ih	out std_logic
exec_ih	out std_logic
ld_add_ih	out std_logic
fec_add_ih	out std_logic_vector ( 3 downto 0 )
sm_wrds	out std_logic_vector ( 3 downto 0 )
fsm_st	out std_logic_vector ( 3 downto 0 )
bc_add_ih	out std_logic_vector ( 7 downto 0 )

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Member Data Documentation

addr_dcs in std_logic_vector ( 15 downto 0 ) [Port]

bc_add_ih out std_logic_vector ( 7 downto 0 ) [Port]

bsy_to_dcs out std_logic [Port]

clk in std_logic [Port]

confg_err in std_logic_vector ( 7 downto 0 ) [Port]

dout_dcs out std_logic_vector ( 15 downto 0 ) [Port]

en_mem in std_logic [Port]

end_rd in std_logic [Port]

exec_ih out std_logic [Port]

fec_act_list in std_logic_vector ( 15 downto 0 ) [Port]

fec_add_ih out std_logic_vector ( 3 downto 0 ) [Port]

fec_rdo_list in std_logic_vector ( 15 downto 0 ) [Port]

fsm_st out std_logic_vector ( 3 downto 0 ) [Port]

i2c_bsy in std_logic [Port]

IEEE library [Library]

ih_act_list out std_logic_vector ( 15 downto 0 ) [Port]

ih_rdo_list out std_logic_vector ( 15 downto 0 ) [Port]

intr_in in std_logic [Port]

ld_add_ih out std_logic [Port]

msm2_cnt16_pack package [Package]

msm2_cnt_fec_pack package [Package]

msm2_err_hndl_pack package [Package]

msm2_fsm_int_hndl_pack package [Package]

msmodule2_lib library [Library]

numeric_std package [Package]

rslt_reg in std_logic_vector ( 15 downto 0 ) [Port]

rst in std_logic [Port]

sel_add_ih out std_logic [Port]

set_act in std_logic [Port]

set_rdo in std_logic [Port]

sm_wrds out std_logic_vector ( 3 downto 0 ) [Port]

STD_LOGIC_1164 package [Package]

sv_fec_add in std_logic [Port]

warn_dcs out std_logic [Port]

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The documentation for this class was generated from the following file:

• msmodule2/msm2_inthandler/msm2_inthandler.vhd