Architectures | |
ARCH_interface_I2C | Architecture |
Libraries | |
IEEE | |
msmodule2_lib | |
Packages | |
STD_LOGIC_1164 | |
msm2_clk_div_pack | Package <msm2_clk_div_pack> |
msm2_fsm_i2c_pack | Package <msm2_fsm_i2c_pack> |
msm2_mux_dec_pack | Package <msm2_mux_dec_pack> |
msm2_reg_so_pack | Package <msm2_reg_so_pack> |
msm2_sipo_pack | Package <msm2_sipo_pack> |
msm2_st_bit_cnt_pack | Package <msm2_st_bit_cnt_pack> |
Ports | |
rst | in std_logic |
clk | in std_logic |
exec | in std_logic |
rd_nwr | in std_logic |
ld_regs | in std_logic |
fec_add | in std_logic_vector ( 3 downto 0 ) |
bc_reg_add | in std_logic_vector ( 7 downto 0 ) |
B1_din | in std_logic_vector ( 7 downto 0 ) |
B2_din | in std_logic_vector ( 7 downto 0 ) |
rst_rslt | in std_logic |
sv_rslt | out std_logic |
sda_in_B1 | out std_logic_vector ( 7 downto 0 ) |
sda_in_B2 | out std_logic_vector ( 7 downto 0 ) |
end_rd | out std_logic |
I2C_BSY | out std_logic |
err_fec_ack | out std_logic |
err_bc_add | out std_logic |
err_din1_ack | out std_logic |
err_din2_ack | out std_logic |
fsm_state | out std_logic_vector ( 7 downto 0 ) |
bcast | in std_logic |
sda_in | in std_logic |
sda_out | out std_logic |
s_clk | out std_logic |
B1_din in std_logic_vector ( 7 downto 0 ) [Port] |
B2_din in std_logic_vector ( 7 downto 0 ) [Port] |
bc_reg_add in std_logic_vector ( 7 downto 0 ) [Port] |
bcast in std_logic [Port] |
clk in std_logic [Port] |
end_rd out std_logic [Port] |
err_bc_add out std_logic [Port] |
err_din1_ack out std_logic [Port] |
err_din2_ack out std_logic [Port] |
err_fec_ack out std_logic [Port] |
exec in std_logic [Port] |
fec_add in std_logic_vector ( 3 downto 0 ) [Port] |
fsm_state out std_logic_vector ( 7 downto 0 ) [Port] |
I2C_BSY out std_logic [Port] |
IEEE library [Library] |
ld_regs in std_logic [Port] |
msm2_clk_div_pack package [Package] |
msm2_fsm_i2c_pack package [Package] |
msm2_mux_dec_pack package [Package] |
msm2_reg_so_pack package [Package] |
msm2_sipo_pack package [Package] |
msm2_st_bit_cnt_pack package [Package] |
msmodule2_lib library [Library] |
rd_nwr in std_logic [Port] |
rst in std_logic [Port] |
rst_rslt in std_logic [Port] |
s_clk out std_logic [Port] |
sda_in in std_logic [Port] |
sda_in_B1 out std_logic_vector ( 7 downto 0 ) [Port] |
sda_in_B2 out std_logic_vector ( 7 downto 0 ) [Port] |
sda_out out std_logic [Port] |
STD_LOGIC_1164 package [Package] |
sv_rslt out std_logic [Port] |