address_rom_i | rtl | [Signal] |
data_rom_i | rtl | [Signal] |
data_seq_i | rtl | [Signal] |
data_valid_i | rtl | [Signal] |
en_add_i | rtl | [Signal] |
error_i | rtl | [Signal] |
i2c_master | rtl | [Component Instantiation] |
instructions_rom | rtl | [Component Instantiation] |
new_data_i | rtl | [Signal] |
ready_i | rtl | [Signal] |
rw_i | rtl | [Signal] |
s_i | rtl | [Signal] |
seq | rtl | [Component Instantiation] |
start_i | rtl | [Signal] |
stop_i | rtl | [Signal] |
width_i | rtl | [Signal] |