aclr | flex10ke_io | [Port] |
atom_pack | flex10ke_io | [Package] |
clk | flex10ke_io | [Port] |
data_out | arch | [Signal] |
datain | flex10ke_io | [Port] |
dataout | flex10ke_io | [Port] |
devclrn | flex10ke_io | [Port] |
devoe | flex10ke_io | [Port] |
devpor | flex10ke_io | [Port] |
dffe_io | flex10ke_io | [Package] |
dffe_Q | arch | [Signal] |
dffeD | arch | [Signal] |
ena | flex10ke_io | [Port] |
feedback_mode | flex10ke_io | [Generic] |
flex10ke_asynch_io | flex10ke_io | [Package] |
IEEE | flex10ke_io | [Library] |
inst1 | arch | [Component Instantiation] |
io_reg | arch | [Component Instantiation] |
ioreg_clr | arch | [Signal] |
oe | flex10ke_io | [Port] |
open_drain_output | flex10ke_io | [Generic] |
operation_mode | flex10ke_io | [Generic] |
padio | flex10ke_io | [Port] |
power_up | flex10ke_io | [Generic] |
reg_clr | arch | [Signal] |
reg_pre | arch | [Signal] |
reg_source_mode | flex10ke_io | [Generic] |
std_logic_1164 | flex10ke_io | [Package] |
vcc | arch | [Signal] |
VITAL_Primitives | flex10ke_io | [Package] |
VITAL_Timing | flex10ke_io | [Package] |