Architectures | |
rtl | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
Ports | |
clk | in std_logic |
rstb | in std_logic |
clk_en | in std_logic |
valid | in std_logic |
data | in std_logic_vector ( 2 downto 0 ) |
rw | in std_logic |
width | out std_logic |
clk in std_logic [Port] |
clk_en in std_logic [Port] |
data in std_logic_vector ( 2 downto 0 ) [Port] |
ieee library [Library] |
rstb in std_logic [Port] |
rw in std_logic [Port] |
std_logic_1164 package [Package] |
valid in std_logic [Port] |
width out std_logic [Port] |