rtl Architecture Reference
Inheritance diagram for rtl:
Collaboration diagram for rtl:
Processes | |
| update_state | ( clk , rstb ) |
| up_or_clr | ( st , cnt8_i , clear , enable ) |
Types | |
| state | ( s0 , s1 ) |
Signals | |
| st | state |
| nx_st | state |
| cnt8_i | std_logic |
Member Function Documentation
| up_or_clr | ( st , | |
| cnt8_i , | ||
| clear , | ||
| enable ) |
| update_state | ( clk , | |
| rstb ) |
Member Data Documentation
cnt8_i std_logic [Signal] |
state ( s0 , s1 ) [Type] |
The documentation for this class was generated from the following file:
- bc/bc_core/interface_adc/master/serializer/cnt8/cnt8.vhd
