| clr_cnt_i | rtl2 | [Signal] |
| cnt_i | rtl2 | [Signal] |
| counter(clk, rstb) | rtl2 | [Process] |
| en_cnt_i | rtl2 | [Signal] |
| en_reg_i | rtl2 | [Signal] |
| ierr_tx_i | rtl2 | [Signal] |
| not_bcast_i | rtl2 | [Signal] |
| not_sc_i | rtl2 | [Signal] |
| output(clk, rstb) | rtl2 | [Process] |
| reg_add_i | rtl2 | [Signal] |
| slave_tx_fsm(clk, rstb) | rtl2 | [Process] |
| ST_ack_1 | rtl2 | [Constant] |
| ST_ack_2 | rtl2 | [Constant] |
| ST_ack_master_1 | rtl2 | [Constant] |
| ST_ack_master_2 | rtl2 | [Constant] |
| st_i | rtl2 | [Signal] |
| ST_idle | rtl2 | [Constant] |
| ST_load_1 | rtl2 | [Constant] |
| ST_load_2 | rtl2 | [Constant] |
| ST_preload | rtl2 | [Constant] |
| ST_start | rtl2 | [Constant] |
| ST_store_add | rtl2 | [Constant] |
| ST_store_dt | rtl2 | [Constant] |
| ST_wait_add | rtl2 | [Constant] |
| ST_wait_dt | rtl2 | [Constant] |
| ST_wait_stop_1 | rtl2 | [Constant] |
| ST_wait_stop_2 | rtl2 | [Constant] |
| ST_wait_stop_3 | rtl2 | [Constant] |
| state_t | rtl2 | [Type] |
1.6.2-20100208