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FMD (Forward Multiplicity Detector) instructions are preceeded by the keyword FMD .
All FMD READ instructions read the data from the FMD's into the RCU result memory.
The FMD instructions are
- WRITE BIAS < chip_address | BROADCAST > value [value2](
BIAS ) - Write the bias voltage for upper and lower half of the hybrid cards. If value2 is given, then it's the voltage for the upper part, otherwise value is used for both halfs.
The bias voltage has a range of 0 - -1.5V, so each step is approximently -0.0059V. To calculate the voltage for a given input number use where is the input number. To calculate the number corresponding to a voltage use , where again, is the voltage. The default value is (or 0xaa in hexidecimal).
- READ BIAS < chip_address > (
BIAS ) - Read the bias of a board.
- WRITE VFP < chip_address | BROADCAST > value [value2](
VFP ) - Write the VA VFP voltage (control voltage to feedback resistance in pre-amplifier) for upper and lower half of the hybrid cards. If value2 is given, then it's the voltage for the upper part, otherwise value is used for both halfs.
The VFP voltage has a range of -0.2 - -1V, so each step is approximently -0.0031V. To calculate the voltage for a given input number use where is the input number. To calculate the number corresponding to a voltage use , where again, is the voltage. The default value is (or 0x3a in hexidecimal).
- READ VFP < chip_address > (
VFP ) - Read the vfp of a board.
- WRITE VFS < chip_address | BROADCAST > value [value2](
VFS ) - Write the VA VFS voltage (control voltage to feedback resistance in shaper-amplifier) for upper and lower half of the hybrid cards. If value2 is given, then it's the voltage for the upper part, otherwise value is used for both halfs.
The VFP voltage has a range of -0.55 - +0.43V, so each step is approximently +0.0038V. To calculate the voltage for a given input number use where is the input number. To calculate the number corresponding to a voltage use , where again, is the voltage. The default value is (or 0x88 in hexidecimal).
- READ VFS < chip_address > (
VFS ) - Read the vfs of a board.
- WRITE PULSER < chip_address | BROADCAST > value (
PULSER ) - Write the VA PULSER voltage for the hybrid cards.
The pulser voltage has a range of 0 - +0.11V, so each step is approximently +0.0004V. To calculate the voltage for a given input number use where is the input number. To calculate the number corresponding to a voltage use , where again, is the voltage. The default value is (or 0x00 in hexidecimal).
- READ PULSER < chip_address > (
PULSER ) - Read the vfs of a board.
- WRITE SHIFT CLOCK < chip_address | BROADCAST > div [phase] (
SHIFT ) - Write the VA shift clock division and phase for the hybrid cards.
- READ SHIFT CLOCK < chip_address > (
SHIFT ) - Read the shift of a board.
- WRITE SAMPLE CLOCK < chip_address | BROADCAST > div [phase] (
SAMPLE ) - Write the ALTRO sample clock division and phase for the hybrid cards.
- READ SAMPLE CLOCK < chip_address > (
SAMPLE ) - Read the sample of a board.
- WRITE HOLD DELAY < chip_address | BROADCAST > value (
HOLDD ) - Write the VA hold delay time (in terms a 40MHz clock) from Level 0 trigger for the hybrid cards. That is, the number of clock cycles to wait from receiving the level trigger 0 until the hold signal is asserted.
The level 0 trigger arrives at the digitizer board after the bunch crossing. The specs of the VA1 chips states that it has a shaping time of , so we need to wait . Since each clock cycle is , we need to wait 6 clock cycles. Hence the default value is 0x0006
- READ HOLD DELAY < chip_address > (
HOLDD ) - Read the hold delay of a board.
- WRITE TRIGGER ONE TIMEOUT < chip_address | BROADCAST > value (
L1TO ) - Write the VA trigger one timeout time (in terms a 40MHz clock) from Level 0 trigger for the hybrid cards. That is, how many clock cycles we need to wait from receiving the level 0 trigger before we discard the trigger, unless of course we get a level 1 trigger.
The level 0 trigger arrives at the digitizer board after the bunch crossing. In the DAQ TDR, it is stated that the level 1 trigger arrives at the after the bunch crossing, so we should time out after reciving the level 0 trigger. Since each clock cycle is , we need to wait 106 clock cycles. Hence the default value is 0x006a
- READ TRIGGER ONE TIMEOUT < chip_address > (
L1TO ) - Read the trigger one timeout of a board.
- WRITE TRIGGER TWO TIMEOUT < chip_address | BROADCAST > value (
L2TO ) - Write the VA trigger two timeout time (in terms a 40MHz clock) from Level 0 trigger for the hybrid cards. That is, how many clock cycles we need to wait from receiving the level 0 trigger before the ALTRO discards the trigger, unless of course we get a level 2 trigger.
Note, that this register is only used when we generate triggers on the board via the FMD TRIGGER instruction. It is not used by the normal trigger handler.
The level 0 trigger arrives at the digitizer board after the bunch crossing. In the DAQ TDR, it is stated that the level 2 trigger arrives at the after the bunch crossing, so we should time out after reciving the level 0 trigger. Since each clock cycle is , we need to wait 1736 clock cycles. Hence the default value is 0x06c8
- READ TRIGGER TWO TIMEOUT < chip_address > (
L2TO ) - Read the trigger two timeout of a board.
- WRITE RANGE < chip_address | BROADCAST > lower upper(
RANGE ) - Write the VA range of strips to read out. lower should be in the range
and upper should be in the range . Note, that if then that strip is left open all the time. This is useful for calibrations.
- READ TRIGGER ZERO < chip_address > (
L0CNT ) - Read the number of recieved trigger 0's
- READ TRIGGER ONE < chip_address > (
L0ACC ) - Read the number of accepted trigger 0's.
- CHANGE VOLTAGE < chip_address | BROADCAST> (
CHVOL ) - Change the voltages on the hybrids. This changes the voltages to the hybrid card to the values currently in the registers on the board controller.
Normally, one would do something like
GROUP change_dacs :
Write FMD BIAS broadcast 0xaa
Write FMD VFP broadcast 0x3a
Write FMD VFS broadcast 0x88
Write FMD PULSER broadcast 0x00
FMD Change Voltage broadcast
END
- TRIGGER < chip_address | BROADCAST> (
FMDTRIG ) - Start a trigger sequence. First, a level 0 trigger is made on the chip, and propageted to the normal trigger handling. Then after (TRIGGER ONE TIMEOUT - 1) clock cycles, a level 1 trigger is generated and propegated to the normal trigger handler and to the ALTRO's on the board. Finally, after (TRIGGER TWO TIMEOUT - 2) clock cycles a level 2 trigger is generated and sent to the ALTRO's on the board.
- PULSER MODE < ON | OFF > (
CALMODE ) - Turn calibration mode on or off. When this mode is on, the VA1 chips does not read input from the sensor, but rather from the calibration DAC.
So when the chip recieves a levvel 0 trigger (either from an external source, or from the internal trigger box), the trigger handler push some charge on to the input of the VA1 chips. That means, that the trigger handler has to wait an additional before issuing the hold signal, to allow the VA1 shaper circuit to shape the signal. The additional delay is currently hard-coded into the chip.
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